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microwatt
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fpu-init
loadstore-init
core_debug-init
icache-unused-sig
icache-insn-u-state
dcache-unused-sig
unused-sig
divider-init
loadstore-pmu-init
icache-pmu-events
fpu-typo
less-fpga-init
caravel-mpw6-20220530
caravel-mpw5-20220323
caravel-mpw5-20220322
alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
icbi-issue
orange-crab-freq
dcache-nc-fix
remove-potato-uart
cache-tlb-parameters-2
caravel-20210114
caravel-20210105
jtag-port-2
jtag-port
nia-debug
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Commit Graph

9 Commits (a45c503aeae1b87cbe58da6c7fd01047dd0fb7ef)

Author SHA1 Message Date
Jordan Niethe a45c503aea Connect to the caravel logic analyzer 
This connects 32 read and 32 write bits to the caravel logic analyzer.

Thanks to Jordan for the original patch
 4 years ago
Anton Blanchard ce27cd3e28 Disable debug log 4 years ago
Anton Blanchard 5326455c02 No need to set HAS_FPU and LOG_LENGTH in Makefile 4 years ago
Anton Blanchard bf0c08dd87 tie off wb_ext_io_out 4 years ago
Anton Blanchard 120e1ce6ec SPI fixes, and remove reset controller and PLL 
We need to expose all the input, output and output enable SPI lines
in order to use QSPI.

Remove the reset controller and PLL, since we are driving these
directly from caravel.
 4 years ago
Michael Neuling 0664747146 Set alt reset vector to the start of flash at 0xf0000000 and make it 
programmable externally (using carvel LA)
 4 years ago
Michael Neuling 4685ff6bbb Add mc*.vhdl from: 
git@github.com:openpowerwtf/uw_fab.git
 4 years ago
Anton Blanchard d1f0ac2e0b Disable second uart since we aren't using it 4 years ago
Anton Blanchard 17d93d504a Add a toplevel file for caravel 4 years ago