Commit Graph

2 Commits (7c2a2b7414d7dd166f297d316cb60ef88ccdb8d3)

Author SHA1 Message Date
Anton Blanchard 03fd06deaf Rework SOC reset
The old reset code was overly complicated and never worked properly.
Replace it with a simpler sequence that uses a couple of shift registers
to assert resets:

- Wait a number of external clock cycles before removing reset from
  the PLL.

- After the PLL locks and the external reset button isn't pressed,
  wait a number of PLL clock cycles before removing reset from the SOC.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
Olof Kindgren b5bccc4c13 Add dummy clock generator 5 years ago