forked from cores/microwatt
tests: Add a test for trace interrupts
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>jtag-port
parent
b589d2d472
commit
e1672ea709
Binary file not shown.
@ -0,0 +1,7 @@
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test 01:PASS
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test 02:PASS
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test 03:PASS
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test 04:PASS
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test 05:PASS
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test 06:PASS
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test 07:PASS
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@ -0,0 +1,3 @@
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TEST=trace
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include ../Makefile.test
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@ -0,0 +1,216 @@
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/* Copyright 2020 Paul Mackerras, IBM Corp.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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* implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* Load an immediate 64-bit value into a register */
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#define LOAD_IMM64(r, e) \
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lis r,(e)@highest; \
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ori r,r,(e)@higher; \
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rldicr r,r, 32, 31; \
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oris r,r, (e)@h; \
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ori r,r, (e)@l;
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.section ".head","ax"
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/*
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* Microwatt currently enters in LE mode at 0x0, so we don't need to
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* do any endian fix ups
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*/
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. = 0
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.global _start
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_start:
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LOAD_IMM64(%r10,__bss_start)
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LOAD_IMM64(%r11,__bss_end)
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subf %r11,%r10,%r11
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addi %r11,%r11,63
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srdi. %r11,%r11,6
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beq 2f
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mtctr %r11
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1: dcbz 0,%r10
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addi %r10,%r10,64
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bdnz 1b
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2: LOAD_IMM64(%r1,__stack_top)
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li %r0,0
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stdu %r0,-16(%r1)
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mtsprg2 %r0
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LOAD_IMM64(%r12, main)
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mtctr %r12
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bctrl
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attn // terminate on exit
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b .
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exception:
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mtsprg3 %r0
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mfsprg2 %r0
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cmpdi %r0,0
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bne call_ret
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attn
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#define EXCEPTION(nr) \
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.= nr ;\
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li %r0,nr ;\
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b exception
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EXCEPTION(0x300)
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EXCEPTION(0x380)
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EXCEPTION(0x400)
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EXCEPTION(0x480)
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EXCEPTION(0x500)
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EXCEPTION(0x600)
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EXCEPTION(0x700)
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EXCEPTION(0x800)
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EXCEPTION(0x900)
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EXCEPTION(0x980)
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EXCEPTION(0xa00)
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EXCEPTION(0xb00)
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EXCEPTION(0xc00)
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EXCEPTION(0xd00)
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EXCEPTION(0xe00)
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EXCEPTION(0xe20)
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EXCEPTION(0xe40)
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EXCEPTION(0xe60)
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EXCEPTION(0xe80)
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EXCEPTION(0xf00)
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EXCEPTION(0xf20)
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EXCEPTION(0xf40)
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EXCEPTION(0xf60)
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EXCEPTION(0xf80)
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. = 0x1000
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/*
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* Call a function in a context with a given MSR value.
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* r3, r4 = args; r5 = function, r6 = MSR,
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* r7 = array in which to return r3 and r4
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* Return value is trap number or 0.
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*/
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.globl callit
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callit:
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mflr %r0
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std %r0,16(%r1)
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stdu %r1,-256(%r1)
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mfcr %r8
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stw %r8,100(%r1)
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std %r13,104(%r1)
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std %r14,112(%r1)
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std %r15,120(%r1)
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std %r16,128(%r1)
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std %r17,136(%r1)
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std %r18,144(%r1)
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std %r19,152(%r1)
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std %r20,160(%r1)
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std %r21,168(%r1)
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std %r22,176(%r1)
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std %r23,184(%r1)
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std %r24,192(%r1)
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std %r25,200(%r1)
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std %r26,208(%r1)
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std %r27,216(%r1)
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std %r28,224(%r1)
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std %r29,232(%r1)
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std %r30,240(%r1)
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std %r31,248(%r1)
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li %r10,call_ret@l
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mtlr %r10
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mtsprg0 %r7
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mtsprg1 %r1
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mtsprg2 %r2
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li %r11,0
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mtsprg3 %r11
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mtsrr0 %r5
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mtsrr1 %r6
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rfid
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call_ret:
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mfsprg0 %r7 /* restore regs in case of trap */
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mfsprg1 %r1
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mfsprg2 %r2
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li %r0,0
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mtsprg2 %r0
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std %r3,0(%r7)
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std %r4,8(%r7)
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mfsprg3 %r3
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lwz %r8,100(%r1)
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mtcr %r8
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ld %r13,104(%r1)
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ld %r14,112(%r1)
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ld %r15,120(%r1)
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ld %r16,128(%r1)
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ld %r17,136(%r1)
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ld %r18,144(%r1)
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ld %r19,152(%r1)
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ld %r20,160(%r1)
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ld %r21,168(%r1)
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ld %r22,176(%r1)
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ld %r23,184(%r1)
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ld %r24,192(%r1)
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ld %r25,200(%r1)
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ld %r26,208(%r1)
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ld %r27,216(%r1)
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ld %r28,224(%r1)
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ld %r29,232(%r1)
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ld %r30,240(%r1)
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ld %r31,248(%r1)
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addi %r1,%r1,256
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ld %r0,16(%r1)
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mtlr %r0
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blr
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.global test1
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test1:
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addi %r3,%r4,1
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li %r3,0
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blr
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.global test2
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test2:
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ld %r3,0(%r4)
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li %r3,-1
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blr
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.global test3
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test3:
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stw %r3,0(%r4)
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li %r3,-1
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blr
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.global test4
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test4:
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dcbt 0,%r3
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li %r3,-1
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blr
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.global test5
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test5:
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dcbtst 0,%r3
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li %r3,-1
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blr
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.global test6
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test6:
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nop
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nop
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b 1f
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li %r3,2
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blr
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1: li %r3,1
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blr
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.global test7
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test7:
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li %r4,1
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cmpwi %r4,0
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bne 1f
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li %r3,-1
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1: blr
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@ -0,0 +1,27 @@
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SECTIONS
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{
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. = 0;
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_start = .;
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.head : {
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KEEP(*(.head))
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}
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. = ALIGN(0x1000);
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.text : { *(.text) *(.text.*) *(.rodata) *(.rodata.*) }
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. = ALIGN(0x1000);
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.data : { *(.data) *(.data.*) *(.got) *(.toc) }
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. = ALIGN(0x80);
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__bss_start = .;
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.bss : {
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*(.dynsbss)
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*(.sbss)
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*(.scommon)
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*(.dynbss)
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*(.bss)
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*(.common)
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*(.bss.*)
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}
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. = ALIGN(0x80);
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__bss_end = .;
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. = . + 0x4000;
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__stack_top = .;
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}
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#include <stddef.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "console.h"
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extern unsigned long callit(unsigned long arg1, unsigned long arg2,
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unsigned long (*fn)(unsigned long, unsigned long),
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unsigned long msr, unsigned long *regs);
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#define MSR_SE 0x400
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#define MSR_BE 0x200
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#define SRR0 26
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#define SRR1 27
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#define SPRG0 272
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#define SPRG1 273
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static inline unsigned long mfmsr(void)
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{
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unsigned long msr;
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__asm__ volatile ("mfmsr %0" : "=r" (msr));
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return msr;
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}
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static inline unsigned long mfspr(int sprnum)
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{
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long val;
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__asm__ volatile("mfspr %0,%1" : "=r" (val) : "i" (sprnum));
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return val;
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}
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static inline void mtspr(int sprnum, unsigned long val)
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{
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__asm__ volatile("mtspr %0,%1" : : "i" (sprnum), "r" (val));
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}
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void print_string(const char *str)
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{
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for (; *str; ++str)
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putchar(*str);
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}
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void print_hex(unsigned long val, int ndigits)
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{
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int i, x;
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for (i = (ndigits - 1) * 4; i >= 0; i -= 4) {
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x = (val >> i) & 0xf;
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if (x >= 10)
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putchar(x + 'a' - 10);
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else
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putchar(x + '0');
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}
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}
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// i < 100
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void print_test_number(int i)
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{
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print_string("test ");
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putchar(48 + i/10);
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putchar(48 + i%10);
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putchar(':');
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}
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extern unsigned long test1(unsigned long, unsigned long);
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int trace_test_1(void)
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{
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unsigned long ret;
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unsigned long regs[2];
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ret = callit(1, 2, test1, mfmsr() | MSR_SE, regs);
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if (ret != 0xd00 || mfspr(SRR0) != (unsigned long)&test1 + 4)
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return ret + 1;
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if ((mfspr(SRR1) & 0x781f0000) != 0x40000000)
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return ret + 2;
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if (regs[0] != 3 || regs[1] != 2)
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return 3;
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return 0;
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}
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extern unsigned long test2(unsigned long, unsigned long);
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int trace_test_2(void)
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{
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unsigned long x = 3;
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unsigned long ret;
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unsigned long regs[2];
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ret = callit(1, (unsigned long)&x, test2, mfmsr() | MSR_SE, regs);
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if (ret != 0xd00 || mfspr(SRR0) != (unsigned long)&test2 + 4)
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return ret + 1;
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if ((mfspr(SRR1) & 0x781f0000) != 0x50000000)
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return ret + 2;
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if (regs[0] != 3 || x != 3)
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return 3;
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return 0;
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}
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extern unsigned long test3(unsigned long, unsigned long);
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int trace_test_3(void)
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{
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unsigned int x = 3;
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unsigned long ret;
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unsigned long regs[2];
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ret = callit(11, (unsigned long)&x, test3, mfmsr() | MSR_SE, regs);
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if (ret != 0xd00 || mfspr(SRR0) != (unsigned long)&test3 + 4)
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return ret + 1;
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if ((mfspr(SRR1) & 0x781f0000) != 0x48000000)
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return ret + 2;
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if (regs[0] != 11 || x != 11)
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return 3;
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return 0;
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}
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extern unsigned long test4(unsigned long, unsigned long);
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int trace_test_4(void)
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{
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unsigned long x = 3;
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unsigned long ret;
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unsigned long regs[2];
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ret = callit(1, (unsigned long)&x, test4, mfmsr() | MSR_SE, regs);
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if (ret != 0xd00 || mfspr(SRR0) != (unsigned long)&test4 + 4)
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return ret + 1;
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if ((mfspr(SRR1) & 0x781f0000) != 0x50000000)
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return ret + 2;
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if (regs[0] != 1 || x != 3)
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return 3;
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return 0;
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}
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extern unsigned long test5(unsigned long, unsigned long);
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int trace_test_5(void)
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{
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unsigned int x = 7;
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unsigned long ret;
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unsigned long regs[2];
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ret = callit(11, (unsigned long)&x, test5, mfmsr() | MSR_SE, regs);
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if (ret != 0xd00 || mfspr(SRR0) != (unsigned long)&test5 + 4)
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return ret + 1;
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if ((mfspr(SRR1) & 0x781f0000) != 0x48000000)
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return ret + 2;
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if (regs[0] != 11 || x != 7)
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return 3;
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return 0;
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}
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extern unsigned long test6(unsigned long, unsigned long);
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int trace_test_6(void)
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{
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unsigned long ret;
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unsigned long regs[2];
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ret = callit(11, 55, test6, mfmsr() | MSR_BE, regs);
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if (ret != 0xd00 || mfspr(SRR0) != (unsigned long)&test6 + 20)
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return ret + 1;
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if ((mfspr(SRR1) & 0x781f0000) != 0x40000000)
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return ret + 2;
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if (regs[0] != 11 || regs[1] != 55)
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return 3;
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return 0;
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}
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extern unsigned long test7(unsigned long, unsigned long);
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int trace_test_7(void)
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{
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unsigned long ret;
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unsigned long regs[2];
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ret = callit(11, 55, test7, mfmsr() | MSR_BE, regs);
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if (ret != 0xd00 || mfspr(SRR0) != (unsigned long)&test7 + 16)
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return ret + 1;
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if ((mfspr(SRR1) & 0x781f0000) != 0x40000000)
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return ret + 2;
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if (regs[0] != 11 || regs[1] != 1)
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return 3;
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return 0;
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}
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int fail = 0;
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void do_test(int num, int (*test)(void))
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{
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int ret;
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print_test_number(num);
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ret = test();
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if (ret == 0) {
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print_string("PASS\r\n");
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} else {
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fail = 1;
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print_string("FAIL ");
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print_hex(ret, 4);
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print_string("\r\n");
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}
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}
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int main(void)
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{
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console_init();
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do_test(1, trace_test_1);
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do_test(2, trace_test_2);
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do_test(3, trace_test_3);
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do_test(4, trace_test_4);
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do_test(5, trace_test_5);
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do_test(6, trace_test_6);
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do_test(7, trace_test_7);
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return fail;
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}
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