From 4c21587c4d0dcd6fdacf742fdd5454823919831e Mon Sep 17 00:00:00 2001 From: Michael Neuling Date: Mon, 8 Feb 2021 20:17:48 +1100 Subject: [PATCH 1/2] Fix DAR/DSISR reading before they are written If the DAR and DSISR are read before they are written, we assert with: register_file.vhdl:55:25:@60195ns:(report note): Writing GPR 09 00000000XXXXXXXX register_file.vhdl:61:17:@60195ns:(assertion failure): Assertion violation This initialises DAR/DSISR to avoid this. Signed-off-by: Michael Neuling --- loadstore1.vhdl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/loadstore1.vhdl b/loadstore1.vhdl index ee4507b..3328617 100644 --- a/loadstore1.vhdl +++ b/loadstore1.vhdl @@ -275,6 +275,8 @@ begin r2.wait_dc <= '0'; r2.wait_mmu <= '0'; r2.one_cycle <= '0'; + r3.dar <= (others => '0'); + r3.dsisr <= (others => '0'); r3.state <= IDLE; r3.write_enable <= '0'; r3.interrupt <= '0'; From d26a157cd7cadd4c4821bffb7226fd1d7ba807a6 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Mon, 4 Jan 2021 14:16:06 +1100 Subject: [PATCH 2/2] Add a test to read from all SPRs Make sure the SPRs are initialized and we can't read X state. (Mikey: rebased and added console/bin file for testing) Signed-off-by: Anton Blanchard Signed-off-by: Michael Neuling --- tests/spr_read/Makefile | 3 ++ tests/spr_read/head.S | 46 ++++++++++++++++ tests/spr_read/powerpc.lds | 13 +++++ tests/spr_read/spr_read.c | 92 ++++++++++++++++++++++++++++++++ tests/test_spr_read.bin | Bin 0 -> 6344 bytes tests/test_spr_read.console_out | 25 +++++++++ tests/update_console_tests | 2 +- 7 files changed, 180 insertions(+), 1 deletion(-) create mode 100644 tests/spr_read/Makefile create mode 100644 tests/spr_read/head.S create mode 100644 tests/spr_read/powerpc.lds create mode 100644 tests/spr_read/spr_read.c create mode 100755 tests/test_spr_read.bin create mode 100644 tests/test_spr_read.console_out diff --git a/tests/spr_read/Makefile b/tests/spr_read/Makefile new file mode 100644 index 0000000..70a87c0 --- /dev/null +++ b/tests/spr_read/Makefile @@ -0,0 +1,3 @@ +TEST=spr_read + +include ../Makefile.test diff --git a/tests/spr_read/head.S b/tests/spr_read/head.S new file mode 100644 index 0000000..92d69bb --- /dev/null +++ b/tests/spr_read/head.S @@ -0,0 +1,46 @@ +/* Copyright 2013-2014 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define STACK_TOP 0x2000 + +/* Load an immediate 64-bit value into a register */ +#define LOAD_IMM64(r, e) \ + lis r,(e)@highest; \ + ori r,r,(e)@higher; \ + rldicr r,r, 32, 31; \ + oris r,r, (e)@h; \ + ori r,r, (e)@l; + + .section ".head","ax" + + /* + * Microwatt currently enters in LE mode at 0x0, so we don't need to + * do any endian fix ups + */ + . = 0 +.global _start +_start: + b boot_entry + +.global boot_entry +boot_entry: + /* setup stack */ + LOAD_IMM64(%r1, STACK_TOP - 0x100) + LOAD_IMM64(%r12, main) + mtctr %r12 + bctrl + attn // terminate on exit + b . diff --git a/tests/spr_read/powerpc.lds b/tests/spr_read/powerpc.lds new file mode 100644 index 0000000..0b65470 --- /dev/null +++ b/tests/spr_read/powerpc.lds @@ -0,0 +1,13 @@ +SECTIONS +{ + _start = .; + . = 0; + .head : { + KEEP(*(.head)) + } + . = 0x1000; + .text : { *(.text) } + . = 0x2000; + .data : { *(.data) } + .bss : { *(.bss) } +} diff --git a/tests/spr_read/spr_read.c b/tests/spr_read/spr_read.c new file mode 100644 index 0000000..fa41154 --- /dev/null +++ b/tests/spr_read/spr_read.c @@ -0,0 +1,92 @@ +#include +#include +#include + +#include "console.h" + +#define TEST "Test " +#define PASS "PASS\n" +#define FAIL "FAIL\n" + +// i < 100 +void print_test(char *str) +{ + puts(TEST); + puts(str); + putchar(':'); +} + +#define SPR_XER 1 +#define SPR_LR 8 +#define SPR_CTR 9 +#define SPR_TAR 815 +#define SPR_DSISR 18 +#define SPR_DAR 19 +#define SPR_TB 268 +#define SPR_TBU 269 +#define SPR_DEC 22 +#define SPR_SRR0 26 +#define SPR_SRR1 27 +#define SPR_CFAR 28 +#define SPR_HSRR0 314 +#define SPR_HSRR1 315 +#define SPR_SPRG0 272 +#define SPR_SPRG1 273 +#define SPR_SPRG2 274 +#define SPR_SPRG3 275 +#define SPR_SPRG3U 259 +#define SPR_HSPRG0 304 +#define SPR_HSPRG1 305 +#define SPR_PID 48 +#define SPR_PRTBL 720 +#define SPR_PVR 287 + +#define __stringify_1(x...) #x +#define __stringify(x...) __stringify_1(x) + +int main(void) +{ + unsigned long tmp; + + console_init(); + + /* + * Read all SPRs. Rely on the register file raising an assertion if we + * write X state to a GPR. + */ + +#define DO_ONE(SPR) { \ + print_test(#SPR); \ + __asm__ __volatile__("mfspr %0," __stringify(SPR) : "=r" (tmp)); \ + puts(PASS); \ + } + + DO_ONE(SPR_XER); + DO_ONE(SPR_LR); + DO_ONE(SPR_CTR); + DO_ONE(SPR_TAR); + DO_ONE(SPR_DSISR); + DO_ONE(SPR_DAR); + DO_ONE(SPR_TB); + DO_ONE(SPR_TBU); + DO_ONE(SPR_DEC); + DO_ONE(SPR_SRR0); + DO_ONE(SPR_SRR1); + DO_ONE(SPR_CFAR); + DO_ONE(SPR_HSRR0); + DO_ONE(SPR_HSRR1); + DO_ONE(SPR_SPRG0); + DO_ONE(SPR_SPRG1); + DO_ONE(SPR_SPRG2); + DO_ONE(SPR_SPRG3); + DO_ONE(SPR_SPRG3U); + DO_ONE(SPR_HSPRG0); + DO_ONE(SPR_HSPRG1); + DO_ONE(SPR_PID); + DO_ONE(SPR_PRTBL); + DO_ONE(SPR_PVR); + + puts(PASS); + + return 0; +} diff --git a/tests/test_spr_read.bin b/tests/test_spr_read.bin new file mode 100755 index 0000000000000000000000000000000000000000..66a546a96cfa919818a5ed73f0cf4ab3f5a80d07 GIT binary patch literal 6344 zcmeI0-)oas7{{MC4Q=eYuEK;!hkK)5w31?~I1-!GBu%xAw$>zdy<56kSck%7;?j|< zp(r%au`xDqH~zS=bTUTS)h;HqlgZeXyW1|DI&W(ALf8f=wLAMh&-=dZA#{Jh;5~3S z=RBY1dCqgb?|ENHyhMFOW|Sz9zuOQfU_3*w2l7Pa7}4zL-G^rdS5_dq@fX03T`}-fR>7cMqjokzLjaf1%Y=_2v z1-mV*L)fav(uU9Q5bTEJd_&lMjV*&+7Is+JlE$iF6T-TL-PD-xgR$^{u&A(##{6KN z%+glQa~f*{+ab)#c}inpu+?=wUr2Hu(pVqZePNx#c4}+{Y)P1<=en_Z_IJQ;3bXWl zq_F~6Mc5w6`J={Wz|JvCTeWhm&^l3M?Z5H&mxvmJCQT0* z(Bt`k>981&nUo$ypA^kb$4j(m#;86$i8I08ZrPzRYvE^&z~eQ{TWz1DMT*^d1*7Rh zoDctz^7HkqzD5*d+h;xL(k0QD@&=g^=>H|hG=Y_s8Q~bw_?TIu@@`vi)PuR_hxDY^ zxf>@fTOGwCO*J;>PTaD68sLL-Sa%9G`+4M*O56LJF~6yubJGXqTg`c9SlM@GZ;+_6 zpVwSlh^{8~;#?l=MYJdA!`y(TdcD@Z@yJ6w2j(6c%R^78Yh~k3*&EtJZv6cVCg$0p z%v&S985&AtvyJxpM8>lB@F5CEQrs33)x#pOU(VGP&dl zEzi*D47J#6dYePr6Cd?AQ{q8=!h|`Beg;0z z_<#MQLa!N~g=R{^0j8~TvyF56@kU?5$c=5dEHndK86&qg^f>xou;npQuhekW(k}^lar{~Iwiilq95=R=(W9^h4NTD3_BncPU8xIfK>HWULBo^) literal 0 HcmV?d00001 diff --git a/tests/test_spr_read.console_out b/tests/test_spr_read.console_out new file mode 100644 index 0000000..1ccac56 --- /dev/null +++ b/tests/test_spr_read.console_out @@ -0,0 +1,25 @@ +Test SPR_XER:PASS +Test SPR_LR:PASS +Test SPR_CTR:PASS +Test SPR_TAR:PASS +Test SPR_DSISR:PASS +Test SPR_DAR:PASS +Test SPR_TB:PASS +Test SPR_TBU:PASS +Test SPR_DEC:PASS +Test SPR_SRR0:PASS +Test SPR_SRR1:PASS +Test SPR_CFAR:PASS +Test SPR_HSRR0:PASS +Test SPR_HSRR1:PASS +Test SPR_SPRG0:PASS +Test SPR_SPRG1:PASS +Test SPR_SPRG2:PASS +Test SPR_SPRG3:PASS +Test SPR_SPRG3U:PASS +Test SPR_HSPRG0:PASS +Test SPR_HSPRG1:PASS +Test SPR_PID:PASS +Test SPR_PRTBL:PASS +Test SPR_PVR:PASS +PASS diff --git a/tests/update_console_tests b/tests/update_console_tests index a5e6ffc..4e013aa 100755 --- a/tests/update_console_tests +++ b/tests/update_console_tests @@ -3,7 +3,7 @@ # Script to update console related tests from source # -for i in sc illegal decrementer xics privileged mmu misc modes reservation trace fpu ; do +for i in sc illegal decrementer xics privileged mmu misc modes reservation trace fpu spr_read ; do cd $i make cd -