microwatt/tests/test_fpu.console_out

test 01:PASS
test 02:PASS
test 03:PASS
test 04:PASS
test 05:PASS
test 06:PASS
test 07:PASS
tests: Add a test for FP loads and stores This tests that floating-point unavailable exceptions occur as expected on FP loads and stores, and that the simple FP loads and stores appear to give reasonable results. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> 5 years ago			`test 01:PASS`
			`test 02:PASS`
tests/fpu: Add tests for lfs and stfs instructions This exercises the single-to-double and double-to-single conversions, including denormalized cases. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> 5 years ago			`test 03:PASS`
tests/fpu: Add tests for basic FPSCR function and interrupt generation This tests mffs, mtfsf and the generation of floating-point type program interrupts that occur as a result of mtfsf. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> 5 years ago			`test 04:PASS`
			`test 05:PASS`
FPU: Implement fmr and related instructions This implements fmr, fneg, fabs, fnabs and fcpsgn and adds tests for them. This adds logic to unpack and repack floating-point data from the 64-bit packed form (as stored in memory and the register file) into the unpacked form in the fpr_reg_type record. This is not strictly necessary for fmr et al., but will be useful for when we do actual arithmetic. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> 5 years ago			`test 06:PASS`
FPU: Implement floating convert from integer instructions This implements fcfid, fcfidu, fcfids and fcfidus, which convert 64-bit integer values in an FPR into a floating-point value. This brings in a lot of the datapath that will be needed in future, including the shifter, adder, mask generator and count-leading-zeroes logic, along with the machinery for rounding to single-precision or double-precision, detecting inexact results, signalling inexact-result exceptions, and updating result flags in the FPSCR. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> 5 years ago			`test 07:PASS`