matthew1kalasky3
/
microwatt
forked from cores/microwatt
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
You cannot select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
master
fpu-init
loadstore-init
core_debug-init
icache-unused-sig
icache-insn-u-state
dcache-unused-sig
unused-sig
divider-init
loadstore-pmu-init
icache-pmu-events
fpu-typo
less-fpga-init
caravel-mpw6-20220530
caravel-mpw5-20220323
caravel-mpw5-20220322
alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
icbi-issue
orange-crab-freq
dcache-nc-fix
remove-potato-uart
cache-tlb-parameters-2
caravel-20210114
caravel-20210105
jtag-port-2
jtag-port
nia-debug
Branches Tags
${ item.name }
Create tag ${ searchTerm }
Create branch ${ searchTerm }
from '13439c76ba'
${ noResults }
microwatt/tests/test_misc.console_out

7 lines
84 B
Plaintext
Raw Normal View History Unescape Escape

Add a new misc test suite with addpcis tests The two tests obtain NIA with bl+mflr+addi and then compare it against addpcis with the minimum and maximum immediate operand values. They were also tested on a real POWER9 system (in userspace) for good measure. Signed-off-by: Shawn Anastasio <shawn@anastas.io>
5 years ago
Test 01:PASS
Test 02:PASS
tests: Add tests for the PVR The PVR is a privileged read-only SPR. Test reading and writing in both supervisor and problem state. In supervisor state reading returns microwatt's assigned PVR number and writing is a noop. In problem state both reading and writing cause privileged instruction interrupts. Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
4 years ago
Test 03:PASS
Test 04:PASS
tests/misc: Add a test for correct CTR and LR updating by branches This adds a test with a bdnzl followed immediately by a bdnz, to check that CTR and LR both get evaluated and written back correctly in this situation. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Test 05:PASS
tests/misc: Add a test for a load that hits two preceding stores This checks that the store forwarding machinery in the dcache correctly combines forwarded stores when they are partial stores (i.e. only writing part of the doubleword, as for a byte store). Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
3 years ago
Test 06:PASS