From 144580736a5d81671395b385ebaf8bb448d2eb8f Mon Sep 17 00:00:00 2001
From: Michael Neuling <mikey@neuling.org>
Date: Tue, 5 Oct 2021 18:32:38 +1100
Subject: [PATCH] doc: Update README.md to link to Intel LPC spec

Signed-off-by: Michael Neuling <mikey@neuling.org>
---
 README.md | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/README.md b/README.md
index 2e6f0fc..e2eef6e 100644
--- a/README.md
+++ b/README.md
@@ -4,6 +4,9 @@ This is an LPC peripheral that implements LPC IO and FW cycles so that
 it can boot a host like a POWER9. This peripheral would typically sit
 inside a BMC SoC.
 
+It implements the Intel Low Pin Count (LPC) spec from
+[here](https://www.intel.com/content/dam/www/program/design/us/en/documents/low-pin-count-interface-specification.pdf).
+
 # System diagram
 ```
                               .