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### Meeting Recording
Meeting is being recorded
# AGENDA
## New attendees?
## OCP 2022 and SC 2022 readout
* There was a great deal of discussion and presentations and announcements around DC-SCM and RoT/security solutions. It seems clear that this will be an area of industry focus and activity this year.
* Caliptra
* Hydra
* OpenTitan
* The OPF/OCP booth highlighted the following:
* **Code Construct has successfully booted the AC922 with the DC-SCM card and OpenBMC!!**
* There were press releases and a demo (video) at the booth
* **Jeremy Kerr -- Overview/update on this?**
* **A new company, Axiado, has joined the OPF and they showed their DC-SCM/FPGA implementation that boots the AC922**
* This is different than LibreBMC, but proves out the same concepts and is intended to be a commercial offering -- though hardened into an ASIC not as an FPGA. The content they have will not fit on an FPGA currently.
* This was a live demo at the booth
* There were press releases and other demo's as well at the booth that described their implementation and future plans
* **Josel -- Any updates since SC22?**
* **Todd To send Axiado info to Mikey or upload - This is done. Sent to Mikey and posted on the slack channel**
* **The new open source POWER ISA based Computer Architecture curriculum, created by Vtech, was be showcased/advertised**
* We had handouts and a QR code that links to the curriculum information.
* Vtech will potentially be further enhancing the curriculum
* Hoping other universities will use the curriculum and enhance it
* https://github.com/w-feng/CompArch-MIPS-POWER
**Todd** presented (along with Just Thaler from Jabil) at OCP on the some of the issues we face as we move toward modular hardware.
**Todd** was on a panel where the libreBMC solution was presented and next steps/future work was discussed.
## Discuss Goals for 2023
Ideas for disussion:
a. X-86 support
b. Performance improvements
c. Add support for the new POWER core
d. Build a new AC922 interposer due to hardware issues with the existing one. This will not solve the hardware issues with the DC-SCM card. (although not a perfect solution, klayout can import GERBER files and re-create the netlist, followed by schematic and PCB. it's a pain but editing is actually possible. of course it is better to have the original CAD files.)
e. Add support for ECP5
f. Add simulation (renode?)
g. Find other ways to lower the barrier to entry – can we get a set-up running on a hub. **Maybe OSU -- Max?**
h. Add caliptra to BMC on DC-SCM card. But Caliptra may not be easily integratable into an FPGA. Could just have a Caliptra based ASIC on the DC-SCM connector.
i. Replace Microwatt with LibreSOC (which has Formal Correctness Proofs for its pipelines: important for engendering trust in functionality)
j. Bunny from BeTrusted has the some functions needed for an FPGA based ROT. Maybe work with him to create an FPGA based ROT.
k. See the list of project ideas below as well
## New Co-Chair
* Todd is stepping down as co-chair
* Ask for volunteers and vote in a new co-chair to run the Australian time zone call
- Jeremy Kerr
* Vote
- IBM : YES
- VanTosh : YES
- OSU : YES
## OCP DC-SCM 2.0 Working Group and updates
The WG continues to discuss updates/improvements to the standard.
## Communication / Collaboration
* Calendar invites are working now it seems.
* Standing Reminder: Everyone should be posting things into the #librebmc-sig slack channel.
## Gateware
Update?
## Simulation
* Renode looks like a good option for a simulation environment for LibreBMC.
## Soft Cores
* OPF is funding an FPGA optimized POWER soft core
* Target was "VexRISCV" resource usage and performance. **We should get a progress readout at a future meeting.**
## Toolchain
Updates?
## Software
Updates?
## Project Ideas -- Running list of areas where we could use help
* **Near term project ideas -- things that could be worked on now**
* Get a page going on the OPF web page that we can point people to. **This is still a WIP. Not sure how exactly to format it**
* Meeting invites are still not seeming to get mailed?
* Long term TODO : Need to make the system actually sends emails with ical attachments. It will take awhile to make this work. Rather we should have interested parties import the cal and get notifications.
* Raptor has such a board that has an FPGA on both sides
* Can just use QEMU and simulate the AC922 side
* Hosted on a Hub
* How do we generate more activity/interest
* Engage Universities -- There are interested universities
* Start a list of universities and contacts. Consider making an OPF "Education Page" that points to these projects as well as the OpenPOWER curriculum being developed. Then we can all point our education contacts to that page.
* Need clear work breakdown. We have this for some projects.
* Need Mentors.
* Offer badges/certificates
* Offer Bounties
* Major League Hacking Interships
* Start end of May.
* Need to sign up by end of March
* Must have sponsors to guide students and hold office hours
* To use MLH, We need BoD (Board of Directors) approval
* Need work items clearly identified and easily understood
* It was suggested that we should have a logo for libreBMC. Any thoughts from the team. Nice to have, but should not be a focus right now.