OpenPOWER Cores

A tiny Open POWER ISA softcore written in VHDL 2008

Updated 6 months ago

The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, using out-of-order execution (register renaming, reservation stations, completion buffer) and a store queue

Updated 7 months ago

An experimental small core based on VexRiscv, written in Scala

Updated 2 years ago

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