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30 lines
801 B
Makefile
30 lines
801 B
Makefile
# design and tech
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unit = test_sdr_2r1w_64x72_top
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# top directory
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export DESIGN_TOP = array
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# unit directory (log, objects, reports, results)
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export DESIGN_NICKNAME = array_$(unit)
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# macro
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export DESIGN_NAME = $(unit)
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#tech
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export PLATFORM = sky130hd
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# sources
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export VERILOG_FILES = $(sort $(wildcard ./designs/$(PLATFORM)/$(DESIGN_TOP)/src/verilog/work/test_sdr_2r1w_64x72_top.v))
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export SDC_FILE = ./designs/$(PLATFORM)/$(DESIGN_TOP)/constraint_$(unit).sdc
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$(info Source files:)
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$(info $(VERILOG_FILES))
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$(info ..................................................)
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# parms
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export PLACE_DENSITY ?= 0.50
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export ABC_CLOCK_PERIOD_IN_PS ?= 10
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# must be multiples of placement site (0.46 x 2.72)
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export DIE_AREA = 0 0 3011.160 4022.880
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export CORE_AREA = 5.520 10.880 3005.640 4012.000
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