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147 lines
3.4 KiB
Plaintext
147 lines
3.4 KiB
Plaintext
VERSION 5.7 ;
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NOWIREEXTENSIONATPIN ON ;
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DIVIDERCHAR "/" ;
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BUSBITCHARS "[]" ;
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MACRO toysram_bit
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CLASS BLOCK ;
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FOREIGN toysram_bit ;
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ORIGIN 0.000 0.000 ;
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SIZE 4.750 BY 2.500 ;
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PIN WWL
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ANTENNAGATEAREA 0.147000 ;
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PORT
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LAYER li1 ;
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RECT 0.110 1.940 0.450 2.280 ;
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RECT 0.110 0.400 0.450 0.740 ;
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LAYER mcon ;
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RECT 0.195 2.025 0.365 2.195 ;
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RECT 0.195 0.485 0.365 0.655 ;
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LAYER met1 ;
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RECT 0.110 1.940 0.450 2.280 ;
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RECT 0.110 0.400 0.450 0.740 ;
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LAYER via ;
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RECT 0.140 1.970 0.420 2.250 ;
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RECT 0.140 0.430 0.420 0.710 ;
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LAYER met2 ;
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RECT 0.000 1.940 0.560 2.280 ;
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RECT 0.110 0.400 0.450 1.940 ;
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END
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END WWL
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PIN WBL
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ANTENNADIFFAREA 0.181300 ;
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PORT
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LAYER li1 ;
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RECT 2.315 2.160 2.655 2.500 ;
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LAYER mcon ;
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RECT 2.400 2.245 2.570 2.415 ;
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LAYER met1 ;
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RECT 1.960 2.160 2.800 2.500 ;
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END
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END WBL
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PIN GND
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ANTENNADIFFAREA 0.380800 ;
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PORT
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LAYER li1 ;
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RECT 2.315 1.120 2.655 1.460 ;
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RECT 3.505 1.120 3.845 1.460 ;
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LAYER mcon ;
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RECT 2.400 1.205 2.570 1.375 ;
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RECT 3.590 1.205 3.760 1.375 ;
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LAYER met1 ;
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RECT 2.100 1.120 4.750 1.460 ;
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END
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END GND
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PIN VDD
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ANTENNADIFFAREA 0.142800 ;
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PORT
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LAYER li1 ;
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RECT 1.300 1.120 1.640 1.460 ;
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LAYER mcon ;
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RECT 1.385 1.205 1.555 1.375 ;
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LAYER met1 ;
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RECT 1.050 1.120 1.890 1.460 ;
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END
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END VDD
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PIN WBLb
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ANTENNADIFFAREA 0.196000 ;
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PORT
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LAYER li1 ;
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RECT 2.315 0.060 2.655 0.400 ;
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LAYER mcon ;
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RECT 2.400 0.145 2.570 0.315 ;
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LAYER met1 ;
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RECT 1.820 0.060 2.800 0.400 ;
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END
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END WBLb
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PIN RBL0
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ANTENNADIFFAREA 0.245700 ;
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PORT
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LAYER li1 ;
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RECT 3.505 2.160 3.845 2.500 ;
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LAYER mcon ;
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RECT 3.590 2.245 3.760 2.415 ;
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LAYER met1 ;
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RECT 3.220 2.160 4.130 2.500 ;
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END
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END RBL0
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PIN RBL1
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ANTENNADIFFAREA 0.239400 ;
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PORT
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LAYER li1 ;
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RECT 3.505 0.060 3.845 0.400 ;
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LAYER mcon ;
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RECT 3.590 0.145 3.760 0.315 ;
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LAYER met1 ;
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RECT 3.220 0.060 4.130 0.400 ;
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END
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END RBL1
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PIN RWL0
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ANTENNAGATEAREA 0.094500 ;
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PORT
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LAYER li1 ;
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RECT 4.410 1.895 4.750 2.235 ;
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LAYER mcon ;
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RECT 4.495 1.980 4.665 2.150 ;
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LAYER met1 ;
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RECT 4.410 1.895 4.750 2.235 ;
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LAYER via ;
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RECT 4.440 1.925 4.720 2.205 ;
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LAYER met2 ;
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RECT 4.410 1.895 4.750 2.235 ;
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END
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END RWL0
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PIN RWL1
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ANTENNAGATEAREA 0.094500 ;
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PORT
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LAYER li1 ;
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RECT 4.410 0.315 4.750 0.655 ;
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LAYER mcon ;
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RECT 4.495 0.400 4.665 0.570 ;
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LAYER met1 ;
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RECT 4.410 0.315 4.750 0.655 ;
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LAYER via ;
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RECT 4.440 0.345 4.720 0.625 ;
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LAYER met2 ;
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RECT 4.410 0.315 4.750 0.655 ;
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END
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END RWL1
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OBS
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LAYER pwell ;
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RECT 3.230 2.630 4.120 2.650 ;
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LAYER nwell ;
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RECT 1.050 0.445 1.890 2.105 ;
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LAYER pwell ;
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RECT 2.110 -0.110 4.120 2.630 ;
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RECT 2.110 -0.130 2.860 -0.110 ;
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LAYER li1 ;
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RECT 0.460 1.375 0.800 1.715 ;
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RECT 0.980 1.680 3.080 1.850 ;
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RECT 0.630 0.890 0.800 1.375 ;
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RECT 2.910 1.225 3.080 1.680 ;
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RECT 0.630 0.720 2.730 0.890 ;
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RECT 2.910 0.885 3.250 1.225 ;
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END
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END toysram_bit
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END LIBRARY
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