[*]
[*] GTKWave Analyzer v3.4.0 (w)1999-2022 BSI
[*] Tue Nov  8 18:51:49 2022
[*]
[dumpfile] "/data/projects/toy-sram/rtl/sim/coco/tb_ra_64x72.fst"
[dumpfile_mtime] "Tue Nov  8 18:34:46 2022"
[dumpfile_size] 12534
[savefile] "/data/projects/toy-sram/rtl/sim/coco/ra_64x72_2r1w.gtkw"
[timestart] 23310
[size] 1699 1047
[pos] 192 243
*-12.000000 28000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] tb_ra_64x72_2r1w.
[treeopen] tb_ra_64x72_2r1w.ra.
[treeopen] tb_ra_64x72_2r1w.ra.ra0.
[sst_width] 218
[signals_width] 257
[sst_expanded] 1
[sst_vpaned_height] 301
@28
tb_ra_64x72_2r1w.clk
tb_ra_64x72_2r1w.rd_enb_0
@22
tb_ra_64x72_2r1w.rd_adr_0[0:5]
tb_ra_64x72_2r1w.rd_dat_0[0:71]
@28
tb_ra_64x72_2r1w.rd_enb_1
@22
tb_ra_64x72_2r1w.rd_adr_1[0:5]
tb_ra_64x72_2r1w.rd_dat_1[0:71]
@28
tb_ra_64x72_2r1w.wr_enb_0
@22
tb_ra_64x72_2r1w.wr_adr_0[0:5]
tb_ra_64x72_2r1w.wr_dat_0[0:71]
@200
-RA
@28
tb_ra_64x72_2r1w.ra.rd_enb_0_q
@22
tb_ra_64x72_2r1w.ra.rd_adr_0_q[0:5]
tb_ra_64x72_2r1w.ra.rd_dat_0_q[0:71]
@28
tb_ra_64x72_2r1w.ra.rd_enb_1_q
@22
tb_ra_64x72_2r1w.ra.rd_adr_1_q[0:5]
tb_ra_64x72_2r1w.ra.rd_dat_1_q[0:71]
@28
tb_ra_64x72_2r1w.ra.wr_enb_0_q
@22
tb_ra_64x72_2r1w.ra.wr_adr_0_q[0:5]
tb_ra_64x72_2r1w.ra.wr_dat_0_q[0:71]
@200
-RA0
-W0x
@22
tb_ra_64x72_2r1w.ra.ra0.w00.mem_00[0:11]
tb_ra_64x72_2r1w.ra.ra0.w00.mem_01[0:11]
tb_ra_64x72_2r1w.ra.ra0.w00.mem_02[0:11]
tb_ra_64x72_2r1w.ra.ra0.w00.mem_03[0:11]
tb_ra_64x72_2r1w.ra.ra0.w01.mem_00[0:11]
tb_ra_64x72_2r1w.ra.ra0.w01.mem_01[0:11]
tb_ra_64x72_2r1w.ra.ra0.w01.mem_02[0:11]
@23
tb_ra_64x72_2r1w.ra.ra0.w01.mem_03[0:11]
@22
tb_ra_64x72_2r1w.ra.ra0.w00.RWL0[0:15]
tb_ra_64x72_2r1w.ra.ra0.w00.RWL1[0:15]
tb_ra_64x72_2r1w.ra.ra0.w00.RBL0[0:11]
tb_ra_64x72_2r1w.ra.ra0.w00.RBL1[0:11]
tb_ra_64x72_2r1w.ra.ra0.w00.WWL[0:15]
tb_ra_64x72_2r1w.ra.ra0.w01.RWL0[0:15]
tb_ra_64x72_2r1w.ra.ra0.w01.RWL1[0:15]
tb_ra_64x72_2r1w.ra.ra0.w01.RBL0[0:11]
tb_ra_64x72_2r1w.ra.ra0.w01.RBL1[0:11]
tb_ra_64x72_2r1w.ra.ra0.w01.WWL[0:15]
tb_ra_64x72_2r1w.ra.ra0.w00.mem_08[0:11]
tb_ra_64x72_2r1w.ra.ra0.w01.mem_08[0:11]
tb_ra_64x72_2r1w.ra.ra0.w00.WWL[0:15]
tb_ra_64x72_2r1w.ra.ra0.w01.WWL[0:15]
[pattern_trace] 1
[pattern_trace] 0