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85 lines
2.3 KiB
Python
85 lines
2.3 KiB
Python
from amaranth import *
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from amaranth.utils import log2_int
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from power_fv.reg import *
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__all__ = [
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"gprf_port_layout", "mem_port_layout", "reg_port_layout",
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"Interface",
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]
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def gprf_port_layout():
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return [
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("index" , unsigned( 5)),
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("r_stb" , unsigned( 1)),
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("r_data", unsigned(64)),
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("w_stb", unsigned( 1)),
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("w_data", unsigned(64)),
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]
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def mem_port_layout():
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layout = [
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("addr", unsigned(64)),
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("r_mask", unsigned( 8)),
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("r_data", unsigned(64)),
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("w_mask", unsigned( 8)),
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("w_data", unsigned(64)),
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]
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return layout
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def reg_port_layout(reg_layout):
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return [
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("r_mask", reg_layout),
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("r_data", reg_layout),
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("w_mask", reg_layout),
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("w_data", reg_layout),
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]
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class Interface(Record):
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"""Power-FV interface.
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The interface between the formal testbench and the processor-under-test.
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Attributes
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----------
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stb : Signal
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Instruction strobe. Asserted when the processor retires an instruction. Other signals are
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only valid when ``stb`` is asserted.
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"""
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def __init__(self, *, mem_aligned=False, illegal_insn_heai=False,
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name=None, src_loc_at=0):
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self.mem_aligned = bool(mem_aligned)
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self.illegal_insn_heai = bool(illegal_insn_heai)
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layout = [
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("stb" , unsigned( 1)),
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("insn" , unsigned(64)),
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("order", unsigned(64)),
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("intr" , unsigned( 1)),
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("cia" , unsigned(64)),
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("nia" , unsigned(64)),
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("skip" , unsigned( 1)),
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("ra", gprf_port_layout()),
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("rb", gprf_port_layout()),
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("rs", gprf_port_layout()),
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("rt", gprf_port_layout()),
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("mem", mem_port_layout()),
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("cr" , reg_port_layout( cr_layout)),
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("msr" , reg_port_layout( msr_layout)),
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("lr" , reg_port_layout( lr_layout)),
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("ctr" , reg_port_layout( ctr_layout)),
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("tar" , reg_port_layout( tar_layout)),
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("xer" , reg_port_layout( xer_layout)),
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("srr0", reg_port_layout(srr0_layout)),
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("srr1", reg_port_layout(srr1_layout)),
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]
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super().__init__(layout, name=name, src_loc_at=1 + src_loc_at)
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