5 Commits (7aaeff1122b8da58cd5ff02f36c97b3491f75e3b)

Author SHA1 Message Date
Jean-François Nguyen 7aaeff1122 pfv: add configurable memory alignment constraints.
Before this commit, the `mem_aligned` parameter assumed a 64-bit data
bus when set to True.
2 years ago
Jean-François Nguyen 331e4b76ba insn: use records to define instruction encodings.
Before this commit, instructions were defined by a sequence of Const
for fixed fields (e.g. PO/XO) and AnyConst for others (e.g. operands).
This approach restricted their use to BMC use-cases, and prevented them
from appearing in VCD traces.

After this commit, an instruction encoding is defined by a Record. As
fields can now be set to arbitrary values, the corresponding InsnSpec
will only assert `pfv.stb` if `pfv.insn` matches a valid encoding (i.e.
fixed fields have correct values). On the other side, BMC testbenches
will drive `pfv.insn` with an AnyConst, and assume `pfv.stb` is high.
2 years ago
Jean-François Nguyen d3546e4362 insn.spec: implement some interrupts (program,alignment,system call). 2 years ago
Jean-François Nguyen 2e29794b7d check.insn: use DUT parameters to configure the spec pfv.Interface. 2 years ago
Jean-François Nguyen 0f731db18a Add checks for Load/Store instructions. 2 years ago