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9961d70dfb
We can now pass both the input clock and target clock frequency via generics. Add support for both 50Mhz and 100Mhz target freqs for both cases. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
5 years ago | |
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LICENSE | 5 years ago | |
arty_a7.xdc | 5 years ago | |
clk_gen_bypass.vhd | 5 years ago | |
clk_gen_mcmm.vhd | 5 years ago | |
clk_gen_plle2.vhd | 5 years ago | |
cmod_a7-35.xdc | 5 years ago | |
firmware.hex | 5 years ago | |
hello_world.hex | 5 years ago | |
mw_soc_memory.vhdl | 5 years ago | |
nexys-video.xdc | 5 years ago | |
nexys_a7.xdc | 5 years ago | |
pp_fifo.vhd | 5 years ago | |
pp_soc_uart.vhd | 5 years ago | |
pp_utilities.vhd | 5 years ago | |
soc_reset.vhdl | 5 years ago | |
soc_reset_tb.vhdl | 5 years ago | |
toplevel.vhdl | 5 years ago |