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# Create makefile dependencies for VHDL files, looking for "use work" and
# "entity work" declarations
import sys
import re
work = re.compile('use work\.([^.]+)\.')
entity = re.compile('entity work\.(.*)')
for filename in sys.argv[1:]:
with open(filename, 'r') as f:
(basename, suffix) = filename.split('.')
print('%s.o:' % basename, end='')
for line in f:
m =
if m:
print(' %s.o' %, end='')
m =
if m:
print(' %s.o' %, end='')