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microwatt/include
Paul Mackerras 9a06b0c182 soc: Implement multiple CPU cores
This adds an 'NCPUS' generic parameter to the soc module, which then
includes that many CPU cores.

The cores have separate addresses on the DMI interconnect, meaning
that external JTAG debug tools can view and control the state of each
core individually.

The syscon module has a new 'cpu_ctrl' register, where byte 0 contains
individual enable bits for each core, and byte 1 indicates the number
of cores.  If a core's enable bit is clear, the core is held in reset.
On system reset, the enable byte is set to 0x01, so only core 0 is
active.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2 weeks ago
..
console.h console: Cleanup console API 5 years ago
io.h Add microwatt_soc.h and io.h include file 5 years ago
microwatt_soc.h soc: Implement multiple CPU cores 2 weeks ago