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166 lines
3.0 KiB
ArmAsm
166 lines
3.0 KiB
ArmAsm
/* Copyright 2013-2014 IBM Corp.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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* implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* Load an immediate 64-bit value into a register */
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#define LOAD_IMM64(r, e) \
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lis r,(e)@highest; \
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ori r,r,(e)@higher; \
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rldicr r,r, 32, 31; \
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oris r,r, (e)@h; \
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ori r,r, (e)@l;
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.section ".head","ax"
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/*
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* Microwatt currently enters in LE mode at 0x0, so we don't need to
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* do any endian fix ups
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*/
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. = 0
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.global _start
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_start:
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LOAD_IMM64(%r10,__bss_start)
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LOAD_IMM64(%r11,__bss_end)
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subf %r11,%r10,%r11
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addi %r11,%r11,63
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srdi. %r11,%r11,6
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beq 2f
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mtctr %r11
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1: dcbz 0,%r10
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addi %r10,%r10,64
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bdnz 1b
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2: LOAD_IMM64(%r1,__stack_top)
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li %r0,0
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stdu %r0,-16(%r1)
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LOAD_IMM64(%r12, main)
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mtctr %r12
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bctrl
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attn // terminate on exit
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b .
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/* Read a location with translation on */
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.globl test_read
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test_read:
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mfmsr %r9
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ori %r8,%r9,0x10 /* set MSR_DR */
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mtmsrd %r8,0
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mr %r6,%r3
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li %r3,0
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ld %r5,0(%r6)
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li %r3,1
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/* land here if DSI occurred */
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mtmsrd %r9,0
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std %r5,0(%r4)
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blr
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/* Write a location with translation on */
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.globl test_write
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test_write:
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mfmsr %r9
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ori %r8,%r9,0x10 /* set MSR_DR */
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mtmsrd %r8,0
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mr %r6,%r3
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li %r3,0
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std %r4,0(%r6)
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li %r3,1
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/* land here if DSI occurred */
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mtmsrd %r9,0
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blr
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.globl test_exec
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test_exec:
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mtsrr0 %r4
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mtsrr1 %r5
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rfid
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#define EXCEPTION(nr) \
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.= nr ;\
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attn
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/* DSI vector - skip the failing instruction + the next one */
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. = 0x300
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mtsprg0 %r10
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mfsrr0 %r10
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addi %r10,%r10,8
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mtsrr0 %r10
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rfid
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EXCEPTION(0x380)
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/*
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* ISI vector - jump to LR to return from the test,
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* with r3 cleared
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*/
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. = 0x400
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li %r3,0
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blr
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/* More exception stubs */
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EXCEPTION(0x480)
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EXCEPTION(0x500)
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EXCEPTION(0x600)
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EXCEPTION(0x700)
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EXCEPTION(0x800)
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EXCEPTION(0x900)
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EXCEPTION(0x980)
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EXCEPTION(0xa00)
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EXCEPTION(0xb00)
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/*
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* System call - used to exit from tests where MSR[PR]
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* may have been set.
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*/
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. = 0xc00
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blr
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EXCEPTION(0xd00)
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EXCEPTION(0xe00)
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EXCEPTION(0xe20)
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EXCEPTION(0xe40)
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EXCEPTION(0xe60)
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EXCEPTION(0xe80)
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EXCEPTION(0xf00)
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EXCEPTION(0xf20)
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EXCEPTION(0xf40)
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EXCEPTION(0xf60)
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EXCEPTION(0xf80)
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. = 0x1000
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/*
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* This page gets mapped at various locations and
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* the tests try to execute from it.
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* r3 contains the test number.
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*/
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.globl test_start
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test_start:
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nop
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nop
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cmpdi %r3,1
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beq test_1
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cmpdi %r3,2
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beq test_2
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test_return:
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li %r3,1
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sc
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. = 0x1ff8
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/* test a branch near the end of a page */
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test_1: b test_return
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/* test flowing from one page to the next */
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test_2: nop
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b test_return
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