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248 lines
3.5 KiB
ArmAsm
248 lines
3.5 KiB
ArmAsm
/* Copyright 2013-2014 IBM Corp.
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* Copyright 2023 Paul Mackerras <paulus@ozlabs.org>.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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* implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* Load an immediate 64-bit value into a register */
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#define LOAD_IMM64(r, e) \
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lis r,(e)@highest; \
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ori r,r,(e)@higher; \
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rldicr r,r, 32, 31; \
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oris r,r, (e)@h; \
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ori r,r, (e)@l;
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.section ".head","ax"
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/*
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* Microwatt currently enters in LE mode at 0x0, so we don't need to
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* do any endian fix ups
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*/
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. = 0
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.global _start
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_start:
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LOAD_IMM64(%r10,__bss_start)
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LOAD_IMM64(%r11,__bss_end)
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subf %r11,%r10,%r11
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addi %r11,%r11,63
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srdi. %r11,%r11,6
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beq 2f
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mtctr %r11
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1: dcbz 0,%r10
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addi %r10,%r10,64
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bdnz 1b
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2: LOAD_IMM64(%r1,__stack_top)
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li %r0,0
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stdu %r0,-16(%r1)
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LOAD_IMM64(%r10, die)
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mtsprg0 %r10
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LOAD_IMM64(%r12, main)
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mtctr %r12
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bctrl
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die: attn // terminate on exit
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b .
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.global trapit
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trapit:
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mflr %r0
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std %r0,16(%r1)
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stdu %r1,-256(%r1)
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mtsprg1 %r1
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r = 14
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.rept 18
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std r,r*8(%r1)
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r = r + 1
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.endr
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mfcr %r0
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stw %r0,13*8(%r1)
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LOAD_IMM64(%r10, ret)
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mtsprg0 %r10
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mr %r12,%r4
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mtctr %r4
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bctrl
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ret:
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mfsprg1 %r1
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LOAD_IMM64(%r10, die)
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mtsprg0 %r10
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r = 14
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.rept 18
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ld r,r*8(%r1)
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r = r + 1
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.endr
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lwz %r0,13*8(%r1)
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mtcr %r0
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ld %r0,256+16(%r1)
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addi %r1,%r1,256
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mtlr %r0
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blr
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#define EXCEPTION(nr) \
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.= nr ;\
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mfsprg0 %r0 ;\
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mtctr %r0 ;\
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li %r3,nr ;\
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bctr
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EXCEPTION(0x300)
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EXCEPTION(0x380)
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EXCEPTION(0x400)
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EXCEPTION(0x480)
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EXCEPTION(0x500)
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EXCEPTION(0x600)
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EXCEPTION(0x700)
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EXCEPTION(0x800)
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EXCEPTION(0x900)
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EXCEPTION(0x980)
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EXCEPTION(0xa00)
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EXCEPTION(0xb00)
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EXCEPTION(0xc00)
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EXCEPTION(0xd00)
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EXCEPTION(0xe00)
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EXCEPTION(0xe20)
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EXCEPTION(0xe40)
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EXCEPTION(0xe60)
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EXCEPTION(0xe80)
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EXCEPTION(0xf00)
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EXCEPTION(0xf20)
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EXCEPTION(0xf40)
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EXCEPTION(0xf60)
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EXCEPTION(0xf80)
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. = 0x1000
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.globl test_paddi
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test_paddi:
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nop
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nop
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.machine "power10"
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paddi %r3,%r3,0x123456789,0
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blr
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.globl test_paddi_r
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test_paddi_r:
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nop
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nop
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paddi %r3,0,0x123456789 - 0x101c,1
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blr
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.globl test_paddi_neg
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test_paddi_neg:
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nop
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nop
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paddi %r3,%r3,-0x123456789,0
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blr
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.globl test_pld
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test_pld:
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nop
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nop
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pld %r4,lvar(0)
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std %r4,0(%r3)
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li %r3,0
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blr
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.globl test_plfd
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test_plfd:
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nop
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nop
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plfd %f0,fpvar(0)
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stfd %f0,0(%r3)
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blr
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. = 0x1074
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.globl test_paddi_mis
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test_paddi_mis:
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nop
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nop
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.long 0x06012345
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.long 0x38636789
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blr
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.globl test_pstd
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test_pstd:
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nop
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nop
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pstd %r3,lvar(0)
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li %r3,0
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blr
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.globl test_plbz
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test_plbz:
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nop
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nop
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plbz %r4,bvar(0)
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std %r4,0(%r3)
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li %r3,0
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blr
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.globl test_pstb
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test_pstb:
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nop
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nop
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pstb %r3,bvar(0)
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li %r3,0
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blr
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.globl test_plha
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test_plha:
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nop
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nop
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plha %r4,hvar(0)
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std %r4,0(%r3)
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li %r3,0
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blr
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.globl test_plhz
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test_plhz:
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nop
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nop
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plhz %r4,hvar(0)
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std %r4,0(%r3)
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li %r3,0
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blr
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.globl test_psth
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test_psth:
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nop
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nop
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psth %r3,hvar(0)
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li %r3,0
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blr
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.globl test_plwa
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test_plwa:
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nop
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nop
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plwa %r4,wvar(0)
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std %r4,0(%r3)
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li %r3,0
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blr
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.globl test_plwz
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test_plwz:
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nop
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nop
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plwz %r4,wvar(0)
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std %r4,0(%r3)
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li %r3,0
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blr
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.globl test_pstw
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test_pstw:
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nop
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nop
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pstw %r3,wvar(0)
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li %r3,0
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blr
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