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Paul Mackerras
4bef477e29
This adds a new type of stop trigger for the log buffer which triggers when any byte(s) of a specified doubleword of memory are written. The trigger logic snoops the wishbone for writes to the address specified and stops the log 256 cycles later (same as for the instruction fetch address trigger). The trigger address is a real address and sees DMA writes from devices as well as stores done by the CPU. The mw_debug command has a new 'mtrig' subcommand to set the trigger and query its state. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> |
1 year ago | |
|---|---|---|
| .. | ||
| fmt_log | ||
| mw_debug | 1 year ago | |
| bin2hex.py | ||
| dependencies.py | ||
| gen_icache_tb.py | ||
| make_version.sh | ||
| make_version_fusesoc.py | ||
| run_test.sh | ||
| run_test_console.sh | ||
| test_micropython.py | ||
| test_micropython_long.py | ||
| test_micropython_verilator.py | ||
| test_micropython_verilator_long.py | ||
| vhdltags | ||