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54 lines
1.2 KiB
C
54 lines
1.2 KiB
C
#ifndef __IO_H
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#define __IO_H
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static inline uint8_t readb(unsigned long addr)
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{
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uint8_t val;
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__asm__ volatile("sync; lbzcix %0,0,%1" : "=r" (val) : "r" (addr) : "memory");
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return val;
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}
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static inline uint16_t readw(unsigned long addr)
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{
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uint16_t val;
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__asm__ volatile("sync; lhzcix %0,0,%1" : "=r" (val) : "r" (addr) : "memory");
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return val;
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}
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static inline uint32_t readl(unsigned long addr)
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{
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uint32_t val;
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__asm__ volatile("sync; lwzcix %0,0,%1" : "=r" (val) : "r" (addr) : "memory");
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return val;
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}
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static inline uint64_t readq(unsigned long addr)
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{
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uint64_t val;
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__asm__ volatile("sync; ldcix %0,0,%1" : "=r" (val) : "r" (addr) : "memory");
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return val;
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}
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static inline void writeb(uint8_t val, unsigned long addr)
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{
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__asm__ volatile("sync; stbcix %0,0,%1" : : "r" (val), "r" (addr) : "memory");
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}
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static inline void writew(uint16_t val, unsigned long addr)
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{
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__asm__ volatile("sync; sthcix %0,0,%1" : : "r" (val), "r" (addr) : "memory");
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}
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static inline void writel(uint32_t val, unsigned long addr)
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{
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__asm__ volatile("sync; stwcix %0,0,%1" : : "r" (val), "r" (addr) : "memory");
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}
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static inline void writeq(uint64_t val, unsigned long addr)
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{
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__asm__ volatile("sync; stdcix %0,0,%1" : : "r" (val), "r" (addr) : "memory");
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}
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#endif /* __IO_H */
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