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@ -48,7 +48,7 @@ ln -s ../micropython/ports/powerpc/build/firmware.bin simple_ram_behavioural.bin
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## Synthesis on Xilinx FPGAs using Vivado
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- Install Vivado (I'm using the free 2019.1 webpack edition).
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- Install Vivado (I'm using the free 2019.1 web pack edition).
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- Setup Vivado paths:
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@ -93,7 +93,7 @@ make -j$(nproc) check
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## Issues
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This is functional, but very simple. We still have quite a lot to do:
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This is functional but very simple. We still have quite a lot to do:
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- There are a few instructions still to be implemented
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- Need to add caches and bypassing (in progress)
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