FPU: Make an explicit exponent data path
With this, the large case statement sets values for a set of control signals, which then control multiplexers and adders that generate values for v.result_exp and v.shift. The plan is for the case statement to turn into a microcode ROM eventually. The value of v.result_exp is the sum of two values, either of which can be negated (but not both). The first value can be chosen from the result exponent, A exponent, B exponent arithmetically shifted right one bit, or 0. The second value can be chosen from new_exp (which is r.result_exp - r.shift), B exponent, C exponent or a constant. The choices for the constant are 0, 56, the maximum exponent (max_exp) or the exponent bias for trap-enabled overflow conditions (bias_exp). These choices are controlled by the signals re_sel1, re_neg1, re_sel2 and re_neg2, and the sum is written into v.result_exp if re_set_result is 1. For v.shift we also compute the sum of two values, either of which can be negated (but not both). The first value can be chosen from new_exp, B exponent, r.shift, or 0. The second value can be chosen from the A exponent or a constant. The possible constants are 0, 1, 4, 8, 32, 52, 56, 63, 64, or the minimum exponent (min_exp). These choices are controlled by the signals rs_sel1, rs_neg1, rs_sel2 and rs_neg2. After the adder there is a multiplexer which selects either the sum or a shift count for normalization (derived from a count leading zeroes operation on R) to be written into v.shift. The count-leading-zeroes result does not go through the adder for timing reasons. In order to simplify the logic and help improve timing, settings of the control signals have been made unconditional in a state in many places, even if those settings are only required when some condition is met. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>pull/382/head
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