From 84008fbf418b9b6307172c2b3a9d0fbd8e7f3d80 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Thu, 22 Apr 2021 15:37:09 +1000 Subject: [PATCH] arty: Change shield I/O pin bus into individual signals Make the shield I/O pins be individual signals rather than a bus in order to avoid warnings on pins which don't have both a driver and a receiver. Signed-off-by: Paul Mackerras --- fpga/arty_a7.xdc | 66 +++++++++---------- fpga/top-arty.vhdl | 161 +++++++++++++++++++++++++++------------------ 2 files changed, 129 insertions(+), 98 deletions(-) diff --git a/fpga/arty_a7.xdc b/fpga/arty_a7.xdc index 2a01161..622b24d 100644 --- a/fpga/arty_a7.xdc +++ b/fpga/arty_a7.xdc @@ -147,39 +147,39 @@ set_property IOB true [get_cells -hierarchical -filter {NAME =~*.litesdcard/sdca # Arduino/chipKIT shield connector ################################################################################ -set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[0] }]; -set_property -dict { PACKAGE_PIN U16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[1] }]; -set_property -dict { PACKAGE_PIN P14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[2] }]; -set_property -dict { PACKAGE_PIN T11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[3] }]; -set_property -dict { PACKAGE_PIN R12 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[4] }]; -set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[5] }]; -set_property -dict { PACKAGE_PIN T15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[6] }]; -set_property -dict { PACKAGE_PIN T16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[7] }]; -set_property -dict { PACKAGE_PIN N15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[8] }]; -set_property -dict { PACKAGE_PIN M16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[9] }]; -set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[10] }]; -set_property -dict { PACKAGE_PIN U18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[11] }]; -set_property -dict { PACKAGE_PIN R17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[12] }]; -set_property -dict { PACKAGE_PIN P17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[13] }]; -set_property -dict { PACKAGE_PIN U11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[26] }]; -set_property -dict { PACKAGE_PIN V16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[27] }]; -set_property -dict { PACKAGE_PIN M13 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[28] }]; -set_property -dict { PACKAGE_PIN R10 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[29] }]; -set_property -dict { PACKAGE_PIN R11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[30] }]; -set_property -dict { PACKAGE_PIN R13 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[31] }]; -set_property -dict { PACKAGE_PIN R15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[32] }]; -set_property -dict { PACKAGE_PIN P15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[33] }]; -set_property -dict { PACKAGE_PIN R16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[34] }]; -set_property -dict { PACKAGE_PIN N16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[35] }]; -set_property -dict { PACKAGE_PIN N14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[36] }]; -set_property -dict { PACKAGE_PIN U17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[37] }]; -set_property -dict { PACKAGE_PIN T18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[38] }]; -set_property -dict { PACKAGE_PIN R18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[39] }]; -set_property -dict { PACKAGE_PIN P18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[40] }]; -set_property -dict { PACKAGE_PIN N17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[41] }]; -set_property -dict { PACKAGE_PIN M17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[42] }]; # A -set_property -dict { PACKAGE_PIN L18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[43] }]; # SCL -set_property -dict { PACKAGE_PIN M18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io[44] }]; # SDA +set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io0 }]; +set_property -dict { PACKAGE_PIN U16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io1 }]; +set_property -dict { PACKAGE_PIN P14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io2 }]; +set_property -dict { PACKAGE_PIN T11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io3 }]; +set_property -dict { PACKAGE_PIN R12 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io4 }]; +set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io5 }]; +set_property -dict { PACKAGE_PIN T15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io6 }]; +set_property -dict { PACKAGE_PIN T16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io7 }]; +set_property -dict { PACKAGE_PIN N15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io8 }]; +set_property -dict { PACKAGE_PIN M16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io9 }]; +set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io10 }]; +set_property -dict { PACKAGE_PIN U18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io11 }]; +set_property -dict { PACKAGE_PIN R17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io12 }]; +set_property -dict { PACKAGE_PIN P17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io13 }]; +set_property -dict { PACKAGE_PIN U11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io26 }]; +set_property -dict { PACKAGE_PIN V16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io27 }]; +set_property -dict { PACKAGE_PIN M13 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io28 }]; +set_property -dict { PACKAGE_PIN R10 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io29 }]; +set_property -dict { PACKAGE_PIN R11 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io30 }]; +set_property -dict { PACKAGE_PIN R13 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io31 }]; +set_property -dict { PACKAGE_PIN R15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io32 }]; +set_property -dict { PACKAGE_PIN P15 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io33 }]; +set_property -dict { PACKAGE_PIN R16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io34 }]; +set_property -dict { PACKAGE_PIN N16 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io35 }]; +set_property -dict { PACKAGE_PIN N14 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io36 }]; +set_property -dict { PACKAGE_PIN U17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io37 }]; +set_property -dict { PACKAGE_PIN T18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io38 }]; +set_property -dict { PACKAGE_PIN R18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io39 }]; +set_property -dict { PACKAGE_PIN P18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io40 }]; +set_property -dict { PACKAGE_PIN N17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io41 }]; +set_property -dict { PACKAGE_PIN M17 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io42 }]; # A +set_property -dict { PACKAGE_PIN L18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io43 }]; # SCL +set_property -dict { PACKAGE_PIN M18 IOSTANDARD LVCMOS33 PULLDOWN TRUE } [get_ports { shield_io44 }]; # SDA #set_property -dict { PACKAGE_PIN C2 IOSTANDARD LVCMOS33 } [get_ports { shield_rst }]; #set_property -dict { PACKAGE_PIN C1 IOSTANDARD LVCMOS33 } [get_ports { spi_hdr_ss }]; diff --git a/fpga/top-arty.vhdl b/fpga/top-arty.vhdl index e64eba1..dc5a0fe 100644 --- a/fpga/top-arty.vhdl +++ b/fpga/top-arty.vhdl @@ -67,7 +67,38 @@ entity toplevel is sw3 : in std_ulogic; -- GPIO - shield_io : inout std_ulogic_vector(44 downto 0); + shield_io0 : inout std_ulogic; + shield_io1 : inout std_ulogic; + shield_io2 : inout std_ulogic; + shield_io3 : inout std_ulogic; + shield_io4 : inout std_ulogic; + shield_io5 : inout std_ulogic; + shield_io6 : inout std_ulogic; + shield_io7 : inout std_ulogic; + shield_io8 : inout std_ulogic; + shield_io9 : inout std_ulogic; + shield_io10 : inout std_ulogic; + shield_io11 : inout std_ulogic; + shield_io12 : inout std_ulogic; + shield_io13 : inout std_ulogic; + shield_io26 : inout std_ulogic; + shield_io27 : inout std_ulogic; + shield_io28 : inout std_ulogic; + shield_io29 : inout std_ulogic; + shield_io30 : inout std_ulogic; + shield_io31 : inout std_ulogic; + shield_io32 : inout std_ulogic; + shield_io33 : inout std_ulogic; + shield_io34 : inout std_ulogic; + shield_io35 : inout std_ulogic; + shield_io36 : inout std_ulogic; + shield_io37 : inout std_ulogic; + shield_io38 : inout std_ulogic; + shield_io39 : inout std_ulogic; + shield_io40 : inout std_ulogic; + shield_io41 : inout std_ulogic; + shield_io43 : inout std_ulogic; + shield_io44 : inout std_ulogic; -- Ethernet eth_ref_clk : out std_ulogic; @@ -718,38 +749,38 @@ begin gpio_in(16) <= sw2; gpio_in(17) <= sw3; - gpio_in(0) <= shield_io(10); - gpio_in(1) <= shield_io(11); - gpio_in(2) <= shield_io(12); - gpio_in(3) <= shield_io(13); - gpio_in(4) <= shield_io(26); - gpio_in(5) <= shield_io(27); - gpio_in(6) <= shield_io(28); - gpio_in(7) <= shield_io(29); - gpio_in(8) <= shield_io(8); - gpio_in(9) <= shield_io(9); - --gpio_in(10) <= shield_io(10); - --gpio_in(11) <= shield_io(11); - --gpio_in(12) <= shield_io(12); - --gpio_in(13) <= shield_io(13); - --gpio_in(14) <= shield_io(26); - --gpio_in(15) <= shield_io(27); - --gpio_in(16) <= shield_io(28); - --gpio_in(17) <= shield_io(29); - gpio_in(18) <= shield_io(30); - gpio_in(19) <= shield_io(31); - gpio_in(20) <= shield_io(32); - gpio_in(21) <= shield_io(33); - gpio_in(22) <= shield_io(34); - gpio_in(23) <= shield_io(35); - gpio_in(24) <= shield_io(36); - gpio_in(25) <= shield_io(37); - gpio_in(26) <= shield_io(38); - gpio_in(27) <= shield_io(39); - gpio_in(28) <= shield_io(40); - gpio_in(29) <= shield_io(41); - gpio_in(30) <= shield_io(43); - gpio_in(31) <= shield_io(44); + gpio_in(0) <= shield_io10; + gpio_in(1) <= shield_io11; + gpio_in(2) <= shield_io12; + gpio_in(3) <= shield_io13; + gpio_in(4) <= shield_io26; + gpio_in(5) <= shield_io27; + gpio_in(6) <= shield_io28; + gpio_in(7) <= shield_io29; + gpio_in(8) <= shield_io8; + gpio_in(9) <= shield_io9; + --gpio_in(10) <= shield_io10; + --gpio_in(11) <= shield_io11; + --gpio_in(12) <= shield_io12; + --gpio_in(13) <= shield_io13; + --gpio_in(14) <= shield_io26; + --gpio_in(15) <= shield_io27; + --gpio_in(16) <= shield_io28; + --gpio_in(17) <= shield_io29; + gpio_in(18) <= shield_io30; + gpio_in(19) <= shield_io31; + gpio_in(20) <= shield_io32; + gpio_in(21) <= shield_io33; + gpio_in(22) <= shield_io34; + gpio_in(23) <= shield_io35; + gpio_in(24) <= shield_io36; + gpio_in(25) <= shield_io37; + gpio_in(26) <= shield_io38; + gpio_in(27) <= shield_io39; + gpio_in(28) <= shield_io40; + gpio_in(29) <= shield_io41; + gpio_in(30) <= shield_io43; + gpio_in(31) <= shield_io44; led_b_pwm(1) <= gpio_out(0) when gpio_dir(0) = '1' else 'Z'; led_g_pwm(1) <= gpio_out(1) when gpio_dir(1) = '1' else 'Z'; @@ -763,37 +794,37 @@ begin led_g_pwm(3) <= gpio_out(7) when gpio_dir(7) = '1' else 'Z'; led_r_pwm(3) <= gpio_out(8) when gpio_dir(8) = '1' else 'Z'; - --shield_io(0) <= gpio_out(0) when gpio_dir(0) = '1' else 'Z'; - --shield_io(1) <= gpio_out(1) when gpio_dir(1) = '1' else 'Z'; - --shield_io(2) <= gpio_out(2) when gpio_dir(2) = '1' else 'Z'; - --shield_io(3) <= gpio_out(3) when gpio_dir(3) = '1' else 'Z'; - --shield_io(4) <= gpio_out(4) when gpio_dir(4) = '1' else 'Z'; - --shield_io(5) <= gpio_out(5) when gpio_dir(5) = '1' else 'Z'; - --shield_io(6) <= gpio_out(6) when gpio_dir(6) = '1' else 'Z'; - --shield_io(7) <= gpio_out(7) when gpio_dir(7) = '1' else 'Z'; - --shield_io(8) <= gpio_out(8) when gpio_dir(8) = '1' else 'Z'; - shield_io(9) <= gpio_out(9) when gpio_dir(9) = '1' else 'Z'; - shield_io(10) <= gpio_out(10) when gpio_dir(10) = '1' else 'Z'; - shield_io(11) <= gpio_out(11) when gpio_dir(11) = '1' else 'Z'; - shield_io(12) <= gpio_out(12) when gpio_dir(12) = '1' else 'Z'; - shield_io(13) <= gpio_out(13) when gpio_dir(13) = '1' else 'Z'; - shield_io(26) <= gpio_out(14) when gpio_dir(14) = '1' else 'Z'; - shield_io(27) <= gpio_out(15) when gpio_dir(15) = '1' else 'Z'; - shield_io(28) <= gpio_out(16) when gpio_dir(16) = '1' else 'Z'; - shield_io(29) <= gpio_out(17) when gpio_dir(17) = '1' else 'Z'; - shield_io(30) <= gpio_out(18) when gpio_dir(18) = '1' else 'Z'; - shield_io(31) <= gpio_out(19) when gpio_dir(19) = '1' else 'Z'; - shield_io(32) <= gpio_out(20) when gpio_dir(20) = '1' else 'Z'; - shield_io(33) <= gpio_out(21) when gpio_dir(21) = '1' else 'Z'; - shield_io(34) <= gpio_out(22) when gpio_dir(22) = '1' else 'Z'; - shield_io(35) <= gpio_out(23) when gpio_dir(23) = '1' else 'Z'; - shield_io(36) <= gpio_out(24) when gpio_dir(24) = '1' else 'Z'; - shield_io(37) <= gpio_out(25) when gpio_dir(25) = '1' else 'Z'; - shield_io(38) <= gpio_out(26) when gpio_dir(26) = '1' else 'Z'; - shield_io(39) <= gpio_out(27) when gpio_dir(27) = '1' else 'Z'; - shield_io(40) <= gpio_out(28) when gpio_dir(28) = '1' else 'Z'; - shield_io(41) <= gpio_out(29) when gpio_dir(29) = '1' else 'Z'; - shield_io(43) <= gpio_out(30) when gpio_dir(30) = '1' else 'Z'; - shield_io(44) <= gpio_out(31) when gpio_dir(31) = '1' else 'Z'; + --shield_io0 <= gpio_out(0) when gpio_dir(0) = '1' else 'Z'; + --shield_io1 <= gpio_out(1) when gpio_dir(1) = '1' else 'Z'; + --shield_io2 <= gpio_out(2) when gpio_dir(2) = '1' else 'Z'; + --shield_io3 <= gpio_out(3) when gpio_dir(3) = '1' else 'Z'; + --shield_io4 <= gpio_out(4) when gpio_dir(4) = '1' else 'Z'; + --shield_io5 <= gpio_out(5) when gpio_dir(5) = '1' else 'Z'; + --shield_io6 <= gpio_out(6) when gpio_dir(6) = '1' else 'Z'; + --shield_io7 <= gpio_out(7) when gpio_dir(7) = '1' else 'Z'; + --shield_io8 <= gpio_out(8) when gpio_dir(8) = '1' else 'Z'; + shield_io9 <= gpio_out(9) when gpio_dir(9) = '1' else 'Z'; + shield_io10 <= gpio_out(10) when gpio_dir(10) = '1' else 'Z'; + shield_io11 <= gpio_out(11) when gpio_dir(11) = '1' else 'Z'; + shield_io12 <= gpio_out(12) when gpio_dir(12) = '1' else 'Z'; + shield_io13 <= gpio_out(13) when gpio_dir(13) = '1' else 'Z'; + shield_io26 <= gpio_out(14) when gpio_dir(14) = '1' else 'Z'; + shield_io27 <= gpio_out(15) when gpio_dir(15) = '1' else 'Z'; + shield_io28 <= gpio_out(16) when gpio_dir(16) = '1' else 'Z'; + shield_io29 <= gpio_out(17) when gpio_dir(17) = '1' else 'Z'; + shield_io30 <= gpio_out(18) when gpio_dir(18) = '1' else 'Z'; + shield_io31 <= gpio_out(19) when gpio_dir(19) = '1' else 'Z'; + shield_io32 <= gpio_out(20) when gpio_dir(20) = '1' else 'Z'; + shield_io33 <= gpio_out(21) when gpio_dir(21) = '1' else 'Z'; + shield_io34 <= gpio_out(22) when gpio_dir(22) = '1' else 'Z'; + shield_io35 <= gpio_out(23) when gpio_dir(23) = '1' else 'Z'; + shield_io36 <= gpio_out(24) when gpio_dir(24) = '1' else 'Z'; + shield_io37 <= gpio_out(25) when gpio_dir(25) = '1' else 'Z'; + shield_io38 <= gpio_out(26) when gpio_dir(26) = '1' else 'Z'; + shield_io39 <= gpio_out(27) when gpio_dir(27) = '1' else 'Z'; + shield_io40 <= gpio_out(28) when gpio_dir(28) = '1' else 'Z'; + shield_io41 <= gpio_out(29) when gpio_dir(29) = '1' else 'Z'; + shield_io43 <= gpio_out(30) when gpio_dir(30) = '1' else 'Z'; + shield_io44 <= gpio_out(31) when gpio_dir(31) = '1' else 'Z'; end architecture behaviour;