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@ -659,6 +659,36 @@ int mmu_test_20(void)
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return 0;
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}
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int mmu_test_21(void)
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{
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long *mem = (long *) 0x9000;
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long *mem2 = (long *) 0xa000;
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long *ptr = (long *) 0x14a000;
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long val;
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/* create PTE */
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map(ptr, mem, DFLT_PERM);
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/* initialize the memory content */
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mem[45] = 0xfee1800d4ea;
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mem2[45] = 0xabad78323c14;
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/* this should succeed and be a cache miss */
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if (test_read(&ptr[45], &val, 0xdeadbeefd0d0))
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return 1;
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/* dest reg of load should have the value from 0x9000 */
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if (val != 0xfee1800d4ea)
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return 2;
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/* change the mapping to point to 0xa000 (without tlbie) */
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map(ptr, mem2, DFLT_PERM);
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/* flush the whole PID */
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do_tlbie(0x400ul, 1ul << 32);
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/* this should succeed and return the value from 0xa000 */
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if (test_read(&ptr[45], &val, 0xdeadbeefd0d0))
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return 3;
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if (val != 0xabad78323c14)
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return 4;
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return 0;
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}
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int fail = 0;
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void do_test(int num, int (*test)(void))
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@ -719,6 +749,7 @@ int main(void)
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do_test(18, mmu_test_18);
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do_test(19, mmu_test_19);
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do_test(20, mmu_test_20);
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do_test(21, mmu_test_21);
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return fail;
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}
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