From 0de83edf2e64ff73a7145cc6c01a5a0290b0c6a8 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Thu, 23 Jan 2020 11:37:24 +1100 Subject: [PATCH] Fix a Diamond build issue in writeback Diamond doesn't like the "" & method of converting std_logic to a single bit std_logic_vector. Thanks to Olof Kindgren for this patch. Signed-off-by: Anton Blanchard --- writeback.vhdl | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/writeback.vhdl b/writeback.vhdl index e53f46b..a730266 100644 --- a/writeback.vhdl +++ b/writeback.vhdl @@ -64,16 +64,16 @@ begin variable zero : std_ulogic; variable sign : std_ulogic; begin - x := "" & e_in.valid; - y := "" & l_in.valid; + x(0) := e_in.valid; + y(0) := l_in.valid; assert (to_integer(unsigned(x)) + to_integer(unsigned(y))) <= 1 severity failure; - x := "" & e_in.write_enable; - y := "" & l_in.write_enable; + x(0) := e_in.write_enable; + y(0) := l_in.write_enable; assert (to_integer(unsigned(x)) + to_integer(unsigned(y))) <= 1 severity failure; - w := "" & e_in.write_cr_enable; - x := "" & (e_in.write_enable and e_in.rc); + w(0) := e_in.write_cr_enable; + x(0) := (e_in.write_enable and e_in.rc); assert (to_integer(unsigned(w)) + to_integer(unsigned(x))) <= 1 severity failure; w_out <= WritebackToRegisterFileInit;