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/* Copyright 2013-2014 IBM Corp.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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* implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#define STACK_TOP 0x2000
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/* Load an immediate 64-bit value into a register */
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#define LOAD_IMM64(r, e) \
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lis r,(e)@highest; \
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ori r,r,(e)@higher; \
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rldicr r,r, 32, 31; \
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oris r,r, (e)@h; \
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ori r,r, (e)@l;
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.section ".head","ax"
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/*
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* Microwatt currently enters in LE mode at 0x0, so we don't need to
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* do any endian fix ups
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*/
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. = 0
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.global _start
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_start:
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b boot_entry
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.global boot_entry
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boot_entry:
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/* setup stack */
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LOAD_IMM64(%r1, STACK_TOP - 0x100)
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LOAD_IMM64(%r12, main)
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mtctr %r12
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bctrl
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attn // terminate on exit
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b .
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/* test illegal */
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.global ill_test_1
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ill_test_1:
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li %r3, 1 // preload a failure
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.long 0x0 // illegal will be skipped + 1 more
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b 1f // skipped
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li %r3, 1 // preload a failure
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.long 0x0 // illegal will be skipped + 1 more
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b 1f // skipped
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li %r3, 0
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blr
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1:
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li %r3, 1
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blr
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#define EXCEPTION(nr) \
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.= nr ;\
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b .
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/* More exception stubs */
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EXCEPTION(0x300)
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EXCEPTION(0x380)
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EXCEPTION(0x400)
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EXCEPTION(0x480)
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EXCEPTION(0x500)
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EXCEPTION(0x600)
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// We shouldn't get a Program interrupt at 700, so fail
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. = 0x700
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mtsprg0 %r3
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mfsrr0 %r3
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addi %r3, %r3, 4 // skip one instruction, causing a fail
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mtsrr0 %r3
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mfsprg0 %r3
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rfid
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EXCEPTION(0x800)
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EXCEPTION(0x900)
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EXCEPTION(0x980)
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EXCEPTION(0xa00)
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EXCEPTION(0xb00)
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EXCEPTION(0xc00)
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EXCEPTION(0xd00)
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EXCEPTION(0xe00)
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EXCEPTION(0xe20)
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// We now expect a HEAI at e40 for illegal instructions
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. = 0xe40
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mthsprg0 %r3
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mfhsrr0 %r3
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addi %r3, %r3, 8 // skip one instruction, causing success
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mthsrr0 %r3
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mfhsprg0 %r3
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hrfid
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EXCEPTION(0xe60)
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EXCEPTION(0xe80)
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EXCEPTION(0xf00)
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EXCEPTION(0xf20)
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EXCEPTION(0xf40)
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EXCEPTION(0xf60)
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EXCEPTION(0xf80)
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#if 0
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EXCEPTION(0x1000)
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EXCEPTION(0x1100)
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EXCEPTION(0x1200)
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EXCEPTION(0x1300)
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EXCEPTION(0x1400)
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EXCEPTION(0x1500)
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EXCEPTION(0x1600)
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#endif
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