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518 KiB
Verilog

// © IBM Corp. 2020
// Licensed under the Apache License, Version 2.0 (the "License"), as modified by
// the terms below; you may not use the files in this repository except in
// compliance with the License as modified.
// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
//
// Modified Terms:
//
// 1) For the purpose of the patent license granted to you in Section 3 of the
// License, the "Work" hereby includes implementations of the work of authorship
// in physical form.
//
// 2) Notwithstanding any terms to the contrary in the License, any licenses
// necessary for implementation of the Work that are available from OpenPOWER
// via the Power ISA End User License Agreement (EULA) are explicitly excluded
// hereunder, and may be obtained from OpenPOWER under the terms and conditions
// of the EULA.
//
// Unless required by applicable law or agreed to in writing, the reference design
// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License
// for the specific language governing permissions and limitations under the License.
//
// Additional rights, including the ability to physically implement a softcore that
// is compliant with the required sections of the Power ISA Specification, are
// available at no cost under the terms of the OpenPOWER Power ISA EULA, which can be
// obtained (along with the Power ISA) here: https://openpowerfoundation.org.
//********************************************************************
//* TITLE: Memory Management Unit TLB Compare Logic
//* NAME: mmq_tlb_cmp.v
//*********************************************************************
`timescale 1 ns / 1 ns
`include "tri_a2o.vh"
`include "mmu_a2o.vh"
module mmq_tlb_cmp(
inout vdd,
inout gnd,
input clk,
input rst,
input tc_ccflush_dc,
input tc_scan_dis_dc_b,
input tc_scan_diag_dc,
input tc_lbist_en_dc,
input lcb_d_mode_dc,
input lcb_clkoff_dc_b,
input lcb_act_dis_dc,
input [0:4] lcb_mpw1_dc_b,
input lcb_mpw2_dc_b,
input [0:4] lcb_delay_lclkr_dc,
input pc_sg_2,
input pc_func_sl_thold_2,
input pc_func_slp_sl_thold_2,
input pc_func_slp_nsl_thold_2,
input pc_fce_2,
(* pin_data ="PIN_FUNCTION=/SCAN_IN/" *)
input [0:2] ac_func_scan_in,
(* pin_data ="PIN_FUNCTION=/SCAN_OUT/" *)
output [0:2] ac_func_scan_out,
input xu_mm_ccr2_notlb_b,
input [0:`MM_THREADS-1] xu_mm_spr_epcr_dmiuh,
input [0:`MM_THREADS-1] xu_mm_epcr_dgtmi,
input [0:`MM_THREADS-1] xu_mm_msr_gs,
input [0:`MM_THREADS-1] xu_mm_msr_pr,
input xu_mm_xucr4_mmu_mchk_q,
input [0:`LPID_WIDTH-1] lpidr,
input [10:18] mmucr1,
input [64-`MMUCR3_WIDTH:63] mmucr3_0,
input [1:3] tstmode4k_0,
`ifdef MM_THREADS2
input [64-`MMUCR3_WIDTH:63] mmucr3_1,
input [1:3] tstmode4k_1,
`endif
output [0:4] mm_iu_ierat_rel_val,
output [0:`ERAT_REL_DATA_WIDTH-1] mm_iu_ierat_rel_data,
output [0:4] mm_xu_derat_rel_val,
output [0:`ERAT_REL_DATA_WIDTH-1] mm_xu_derat_rel_data,
output [0:6] tlb_cmp_ierat_dup_val,
output [0:6] tlb_cmp_derat_dup_val,
output [0:1] tlb_cmp_erat_dup_wait,
input [0:`PID_WIDTH-1] ierat_req0_pid,
input ierat_req0_as,
input ierat_req0_gs,
input [0:`EPN_WIDTH-1] ierat_req0_epn,
input [0:`THDID_WIDTH-1] ierat_req0_thdid,
input ierat_req0_valid,
input ierat_req0_nonspec,
input [0:`PID_WIDTH-1] ierat_req1_pid,
input ierat_req1_as,
input ierat_req1_gs,
input [0:`EPN_WIDTH-1] ierat_req1_epn,
input [0:`THDID_WIDTH-1] ierat_req1_thdid,
input ierat_req1_valid,
input ierat_req1_nonspec,
input [0:`PID_WIDTH-1] ierat_req2_pid,
input ierat_req2_as,
input ierat_req2_gs,
input [0:`EPN_WIDTH-1] ierat_req2_epn,
input [0:`THDID_WIDTH-1] ierat_req2_thdid,
input ierat_req2_valid,
input ierat_req2_nonspec,
input [0:`PID_WIDTH-1] ierat_req3_pid,
input ierat_req3_as,
input ierat_req3_gs,
input [0:`EPN_WIDTH-1] ierat_req3_epn,
input [0:`THDID_WIDTH-1] ierat_req3_thdid,
input ierat_req3_valid,
input ierat_req3_nonspec,
input [0:`PID_WIDTH-1] ierat_iu4_pid,
input ierat_iu4_gs,
input ierat_iu4_as,
input [0:`EPN_WIDTH-1] ierat_iu4_epn,
input [0:`THDID_WIDTH-1] ierat_iu4_thdid,
input ierat_iu4_valid,
input [0:`LPID_WIDTH-1] derat_req0_lpid,
input [0:`PID_WIDTH-1] derat_req0_pid,
input derat_req0_as,
input derat_req0_gs,
input [0:`EPN_WIDTH-1] derat_req0_epn,
input [0:`THDID_WIDTH-1] derat_req0_thdid,
input [0:`EMQ_ENTRIES-1] derat_req0_emq,
input derat_req0_valid,
input [0:`LPID_WIDTH-1] derat_req1_lpid,
input [0:`PID_WIDTH-1] derat_req1_pid,
input derat_req1_as,
input derat_req1_gs,
input [0:`EPN_WIDTH-1] derat_req1_epn,
input [0:`THDID_WIDTH-1] derat_req1_thdid,
input [0:`EMQ_ENTRIES-1] derat_req1_emq,
input derat_req1_valid,
input [0:`LPID_WIDTH-1] derat_req2_lpid,
input [0:`PID_WIDTH-1] derat_req2_pid,
input derat_req2_as,
input derat_req2_gs,
input [0:`EPN_WIDTH-1] derat_req2_epn,
input [0:`THDID_WIDTH-1] derat_req2_thdid,
input [0:`EMQ_ENTRIES-1] derat_req2_emq,
input derat_req2_valid,
input [0:`LPID_WIDTH-1] derat_req3_lpid,
input [0:`PID_WIDTH-1] derat_req3_pid,
input derat_req3_as,
input derat_req3_gs,
input [0:`EPN_WIDTH-1] derat_req3_epn,
input [0:`THDID_WIDTH-1] derat_req3_thdid,
input [0:`EMQ_ENTRIES-1] derat_req3_emq,
input derat_req3_valid,
input [0:`LPID_WIDTH-1] derat_ex5_lpid,
input [0:`PID_WIDTH-1] derat_ex5_pid,
input derat_ex5_gs,
input derat_ex5_as,
input [0:`EPN_WIDTH-1] derat_ex5_epn,
input [0:`THDID_WIDTH-1] derat_ex5_thdid,
input derat_ex5_valid,
input [0:`TLB_TAG_WIDTH-1] tlb_tag2,
input [0:`TLB_ADDR_WIDTH-1] tlb_addr2,
input [0:1] ex6_illeg_instr,
input ierat_req_taken,
input derat_req_taken,
input ptereload_req_taken,
input [0:1] tlb_tag0_type,
input [64-`REAL_ADDR_WIDTH:51] lrat_tag3_lpn,
input [64-`REAL_ADDR_WIDTH:51] lrat_tag3_rpn,
input [0:3] lrat_tag3_hit_status,
input [0:2] lrat_tag3_hit_entry,
input [64-`REAL_ADDR_WIDTH:51] lrat_tag4_lpn,
input [64-`REAL_ADDR_WIDTH:51] lrat_tag4_rpn,
input [0:3] lrat_tag4_hit_status,
input [0:2] lrat_tag4_hit_entry,
input [0:15] lru_dataout,
input [0:`TLB_WAY_WIDTH*`TLB_WAYS-1] tlb_dataout,
output [0:`TLB_WAY_WIDTH-1] tlb_dataina,
output [0:`TLB_WAY_WIDTH-1] tlb_datainb,
output [0:`TLB_ADDR_WIDTH-1] lru_wr_addr,
output [0:15] lru_write,
output [0:15] lru_datain,
output [0:15] lru_tag4_dataout,
output [0:2] tlb_tag4_esel,
output [0:1] tlb_tag4_wq,
output [0:1] tlb_tag4_is,
output tlb_tag4_gs,
output tlb_tag4_pr,
output tlb_tag4_hes,
output tlb_tag4_atsel,
output tlb_tag4_pt,
output tlb_tag4_cmp_hit,
output tlb_tag4_way_ind,
output tlb_tag4_ptereload,
output tlb_tag4_endflag,
output tlb_tag4_parerr,
output tlb_tag4_nonspec,
output [0:`TLB_ADDR_WIDTH-1] tlb_addr4,
output [0:`TLB_WAYS-1] tlb_tag4_parerr_write,
output tlb_tag5_parerr_zeroize,
output [0:`MM_THREADS-1] tlb_tag5_except,
output [0:`ITAG_SIZE_ENC-1] tlb_tag4_itag,
output [0:`ITAG_SIZE_ENC-1] tlb_tag5_itag,
output [0:`EMQ_ENTRIES-1] tlb_tag5_emq,
input mmucfg_twc,
input mmucfg_lrat,
input tlb0cfg_pt,
input tlb0cfg_gtwe,
input tlb0cfg_ind,
input [0:4] mas2_0_wimge,
input [32:52] mas3_0_rpnl,
input [0:3] mas3_0_ubits,
input [0:5] mas3_0_usxwr,
input [22:31] mas7_0_rpnu,
input mas8_0_vf,
`ifdef MM_THREADS2
input [0:4] mas2_1_wimge,
input [32:52] mas3_1_rpnl,
input [0:3] mas3_1_ubits,
input [0:5] mas3_1_usxwr,
input [22:31] mas7_1_rpnu,
input mas8_1_vf,
`endif
output [0:2] tlb_mas0_esel,
output tlb_mas1_v,
output tlb_mas1_iprot,
output [0:`PID_WIDTH-1] tlb_mas1_tid,
output [0:`PID_WIDTH-1] tlb_mas1_tid_error,
output tlb_mas1_ind,
output tlb_mas1_ts,
output tlb_mas1_ts_error,
output [0:3] tlb_mas1_tsize,
output [0:`EPN_WIDTH-1] tlb_mas2_epn,
output [0:`EPN_WIDTH-1] tlb_mas2_epn_error,
output [0:4] tlb_mas2_wimge,
output [32:51] tlb_mas3_rpnl,
output [0:3] tlb_mas3_ubits,
output [0:5] tlb_mas3_usxwr,
output [22:31] tlb_mas7_rpnu,
output tlb_mas8_tgs,
output tlb_mas8_vf,
output [0:7] tlb_mas8_tlpid,
output [0:8] tlb_mmucr1_een,
output tlb_mmucr1_we,
output [0:`THDID_WIDTH-1] tlb_mmucr3_thdid,
output tlb_mmucr3_resvattr,
output [0:1] tlb_mmucr3_wlc,
output [0:`CLASS_WIDTH-1] tlb_mmucr3_class,
output [0:`EXTCLASS_WIDTH-1] tlb_mmucr3_extclass,
output [0:1] tlb_mmucr3_rc,
output tlb_mmucr3_x,
output tlb_mas_tlbre,
output tlb_mas_tlbsx_hit,
output tlb_mas_tlbsx_miss,
output tlb_mas_dtlb_error,
output tlb_mas_itlb_error,
output [0:`MM_THREADS-1] tlb_mas_thdid,
output tlb_htw_req_valid,
output [0:`TLB_TAG_WIDTH-1] tlb_htw_req_tag,
output [`TLB_WORD_WIDTH:`TLB_WAY_WIDTH-1] tlb_htw_req_way,
output tlbwe_back_inv_valid,
output [0:`MM_THREADS-1] tlbwe_back_inv_thdid,
output [52-`EPN_WIDTH:51] tlbwe_back_inv_addr,
output [0:34] tlbwe_back_inv_attr,
input [0:`PTE_WIDTH-1] ptereload_req_pte_lat,
input [0:`MM_THREADS-1] tlb_ctl_tag2_flush,
input [0:`MM_THREADS-1] tlb_ctl_tag3_flush,
input [0:`MM_THREADS-1] tlb_ctl_tag4_flush,
input [0:`MM_THREADS-1] tlb_resv_match_vec,
output [0:`MM_THREADS-1] mm_xu_eratmiss_done,
output [0:`MM_THREADS-1] mm_xu_tlb_miss,
output [0:`MM_THREADS-1] mm_xu_tlb_inelig,
output [0:`MM_THREADS-1] mm_xu_lrat_miss,
output [0:`MM_THREADS-1] mm_xu_pt_fault,
output [0:`MM_THREADS-1] mm_xu_hv_priv,
output [0:`MM_THREADS-1] mm_xu_esr_pt,
output [0:`MM_THREADS-1] mm_xu_esr_data,
output [0:`MM_THREADS-1] mm_xu_esr_epid,
output [0:`MM_THREADS-1] mm_xu_esr_st,
output [0:`MM_THREADS-1] mm_xu_cr0_eq,
output [0:`MM_THREADS-1] mm_xu_cr0_eq_valid,
output [0:`MM_THREADS-1] mm_xu_tlb_multihit_err,
output [0:`MM_THREADS-1] mm_xu_tlb_par_err,
output [0:`MM_THREADS-1] mm_xu_lru_par_err,
output mm_xu_ord_tlb_multihit,
output mm_xu_ord_tlb_par_err,
output mm_xu_ord_lru_par_err,
output mm_xu_tlb_miss_ored,
output mm_xu_lrat_miss_ored,
output mm_xu_tlb_inelig_ored,
output mm_xu_pt_fault_ored,
output mm_xu_hv_priv_ored,
output mm_xu_cr0_eq_ored,
output mm_xu_cr0_eq_valid_ored,
output mm_pc_tlb_multihit_err_ored,
output mm_pc_tlb_par_err_ored,
output mm_pc_lru_par_err_ored,
input [9:16] tlb_delayed_act,
output [0:9] tlb_cmp_perf_event_t0,
output [0:9] tlb_cmp_perf_event_t1,
output [0:1] tlb_cmp_perf_state,
output tlb_cmp_perf_miss_direct,
output tlb_cmp_perf_hit_direct,
output tlb_cmp_perf_hit_indirect,
output tlb_cmp_perf_hit_first_page,
output tlb_cmp_perf_ptereload,
output tlb_cmp_perf_ptereload_noexcep,
output tlb_cmp_perf_lrat_request,
output tlb_cmp_perf_lrat_miss,
output tlb_cmp_perf_pt_fault,
output tlb_cmp_perf_pt_inelig,
output [0:`TLB_TAG_WIDTH-1] tlb_cmp_dbg_tag4,
output [0:`TLB_WAYS] tlb_cmp_dbg_tag4_wayhit,
output [0:`TLB_ADDR_WIDTH-1] tlb_cmp_dbg_addr4,
output [0:`TLB_WAY_WIDTH-1] tlb_cmp_dbg_tag4_way,
output [0:4] tlb_cmp_dbg_tag4_parerr,
output [0:11] tlb_cmp_dbg_tag4_lru_dataout_q,
output [0:`TLB_WAY_WIDTH-1] tlb_cmp_dbg_tag5_tlb_datain_q,
output [0:11] tlb_cmp_dbg_tag5_lru_datain_q,
output tlb_cmp_dbg_tag5_lru_write,
output tlb_cmp_dbg_tag5_any_exception,
output [0:3] tlb_cmp_dbg_tag5_except_type_q,
output [0:1] tlb_cmp_dbg_tag5_except_thdid_q,
output [0:9] tlb_cmp_dbg_tag5_erat_rel_val,
output [0:131] tlb_cmp_dbg_tag5_erat_rel_data,
output [0:19] tlb_cmp_dbg_erat_dup_q,
output [0:8] tlb_cmp_dbg_addr_enable,
output tlb_cmp_dbg_pgsize_enable,
output tlb_cmp_dbg_class_enable,
output [0:1] tlb_cmp_dbg_extclass_enable,
output [0:1] tlb_cmp_dbg_state_enable,
output tlb_cmp_dbg_thdid_enable,
output tlb_cmp_dbg_pid_enable,
output tlb_cmp_dbg_lpid_enable,
output tlb_cmp_dbg_ind_enable,
output tlb_cmp_dbg_iprot_enable,
output tlb_cmp_dbg_way0_entry_v,
output tlb_cmp_dbg_way0_addr_match,
output tlb_cmp_dbg_way0_pgsize_match,
output tlb_cmp_dbg_way0_class_match,
output tlb_cmp_dbg_way0_extclass_match,
output tlb_cmp_dbg_way0_state_match,
output tlb_cmp_dbg_way0_thdid_match,
output tlb_cmp_dbg_way0_pid_match,
output tlb_cmp_dbg_way0_lpid_match,
output tlb_cmp_dbg_way0_ind_match,
output tlb_cmp_dbg_way0_iprot_match,
output tlb_cmp_dbg_way1_entry_v,
output tlb_cmp_dbg_way1_addr_match,
output tlb_cmp_dbg_way1_pgsize_match,
output tlb_cmp_dbg_way1_class_match,
output tlb_cmp_dbg_way1_extclass_match,
output tlb_cmp_dbg_way1_state_match,
output tlb_cmp_dbg_way1_thdid_match,
output tlb_cmp_dbg_way1_pid_match,
output tlb_cmp_dbg_way1_lpid_match,
output tlb_cmp_dbg_way1_ind_match,
output tlb_cmp_dbg_way1_iprot_match,
output tlb_cmp_dbg_way2_entry_v,
output tlb_cmp_dbg_way2_addr_match,
output tlb_cmp_dbg_way2_pgsize_match,
output tlb_cmp_dbg_way2_class_match,
output tlb_cmp_dbg_way2_extclass_match,
output tlb_cmp_dbg_way2_state_match,
output tlb_cmp_dbg_way2_thdid_match,
output tlb_cmp_dbg_way2_pid_match,
output tlb_cmp_dbg_way2_lpid_match,
output tlb_cmp_dbg_way2_ind_match,
output tlb_cmp_dbg_way2_iprot_match,
output tlb_cmp_dbg_way3_entry_v,
output tlb_cmp_dbg_way3_addr_match,
output tlb_cmp_dbg_way3_pgsize_match,
output tlb_cmp_dbg_way3_class_match,
output tlb_cmp_dbg_way3_extclass_match,
output tlb_cmp_dbg_way3_state_match,
output tlb_cmp_dbg_way3_thdid_match,
output tlb_cmp_dbg_way3_pid_match,
output tlb_cmp_dbg_way3_lpid_match,
output tlb_cmp_dbg_way3_ind_match,
output tlb_cmp_dbg_way3_iprot_match
);
parameter MMQ_TLB_CMP_CSWITCH_0TO7 = 0;
parameter MMU_Mode_Value = 1'b0;
parameter [0:1] TlbSel_Tlb = 2'b00;
parameter [0:1] TlbSel_IErat = 2'b10;
parameter [0:1] TlbSel_DErat = 2'b11;
parameter [0:2] ERAT_PgSize_1GB = 3'b110;
parameter [0:2] ERAT_PgSize_16MB = 3'b111;
parameter [0:2] ERAT_PgSize_1MB = 3'b101;
parameter [0:2] ERAT_PgSize_64KB = 3'b011;
parameter [0:2] ERAT_PgSize_4KB = 3'b001;
parameter [0:3] TLB_PgSize_1GB = 4'b1010;
parameter [0:3] TLB_PgSize_16MB = 4'b0111;
parameter [0:3] TLB_PgSize_1MB = 4'b0101;
parameter [0:3] TLB_PgSize_64KB = 4'b0011;
parameter [0:3] TLB_PgSize_4KB = 4'b0001;
// reserved for indirect entries
parameter [0:2] ERAT_PgSize_256MB = 3'b100;
parameter [0:3] TLB_PgSize_256MB = 4'b1001;
// mmucr1 bits
parameter pos_tlb_pei = 10;
parameter pos_lru_pei = 11;
parameter pos_ictid = 12;
parameter pos_ittid = 13;
parameter pos_dctid = 14;
parameter pos_dttid = 15;
parameter pos_dccd = 16;
parameter pos_tlbwe_binv = 17;
parameter pos_tlbi_msb = 18;
parameter pos_tlbi_rej = 19;
parameter tlb_way0_offset = 0;
parameter tlb_way1_offset = tlb_way0_offset + `TLB_WAY_WIDTH;
parameter tlb_way0_cmpmask_offset = tlb_way1_offset + `TLB_WAY_WIDTH;
parameter tlb_way1_cmpmask_offset = tlb_way0_cmpmask_offset + 5;
parameter tlb_way0_xbitmask_offset = tlb_way1_cmpmask_offset + 5;
parameter tlb_way1_xbitmask_offset = tlb_way0_xbitmask_offset + 5;
parameter tlb_tag3_cmpmask_offset = tlb_way1_xbitmask_offset + 5;
parameter tlb_tag3_clone1_offset = tlb_tag3_cmpmask_offset + 5;
parameter tlb_tag4_way_offset = tlb_tag3_clone1_offset + `TLB_TAG_WIDTH;
parameter tlb_tag4_way_rw_offset = tlb_tag4_way_offset + `TLB_WAY_WIDTH;
parameter tlb_dataina_offset = tlb_tag4_way_rw_offset + `TLB_WAY_WIDTH;
parameter tlb_erat_rel_offset = tlb_dataina_offset + `TLB_WAY_WIDTH;
parameter mmucr1_offset = tlb_erat_rel_offset + 132;
parameter spare_a_offset = mmucr1_offset + 9;
parameter scan_right_0 = spare_a_offset + 16 - 1;
parameter tlb_way2_offset = 0;
parameter tlb_way3_offset = tlb_way2_offset + `TLB_WAY_WIDTH;
parameter tlb_way2_cmpmask_offset = tlb_way3_offset + `TLB_WAY_WIDTH;
parameter tlb_way3_cmpmask_offset = tlb_way2_cmpmask_offset + 5;
parameter tlb_way2_xbitmask_offset = tlb_way3_cmpmask_offset + 5;
parameter tlb_way3_xbitmask_offset = tlb_way2_xbitmask_offset + 5;
parameter tlb_tag3_clone2_offset = tlb_way3_xbitmask_offset + 5;
parameter tlb_tag3_cmpmask_clone_offset = tlb_tag3_clone2_offset + `TLB_TAG_WIDTH;
parameter tlb_erat_rel_clone_offset = tlb_tag3_cmpmask_clone_offset + 5;
parameter tlb_tag4_way_clone_offset = tlb_erat_rel_clone_offset + 132;
parameter tlb_tag4_way_rw_clone_offset = tlb_tag4_way_clone_offset + `TLB_WAY_WIDTH;
parameter tlb_datainb_offset = tlb_tag4_way_rw_clone_offset + `TLB_WAY_WIDTH;
parameter mmucr1_clone_offset = tlb_datainb_offset + `TLB_WAY_WIDTH;
parameter spare_b_offset = mmucr1_clone_offset + 9;
parameter scan_right_1 = spare_b_offset + 16 - 1;
parameter tlb_tag3_offset = 0;
parameter tlb_addr3_offset = tlb_tag3_offset + `TLB_TAG_WIDTH;
parameter lru_tag3_dataout_offset = tlb_addr3_offset + `TLB_ADDR_WIDTH;
parameter tlb_tag4_offset = lru_tag3_dataout_offset + 16;
parameter tlb_tag4_wayhit_offset = tlb_tag4_offset + `TLB_TAG_WIDTH;
parameter tlb_addr4_offset = tlb_tag4_wayhit_offset + `TLB_WAYS + 1;
parameter lru_tag4_dataout_offset = tlb_addr4_offset + `TLB_ADDR_WIDTH;
parameter tlbwe_tag4_back_inv_offset = lru_tag4_dataout_offset + 16;
parameter tlbwe_tag4_back_inv_attr_offset = tlbwe_tag4_back_inv_offset + 2 + 1;
parameter tlb_erat_val_offset = tlbwe_tag4_back_inv_attr_offset + 2;
parameter tlb_erat_dup_offset = tlb_erat_val_offset + 2 * `THDID_WIDTH + 2;
parameter lru_write_offset = tlb_erat_dup_offset + 2 * `THDID_WIDTH + 14;
parameter lru_wr_addr_offset = lru_write_offset + `LRU_WIDTH;
parameter lru_datain_offset = lru_wr_addr_offset + `TLB_ADDR_WIDTH;
parameter eratmiss_done_offset = lru_datain_offset + `LRU_WIDTH;
parameter tlb_miss_offset = eratmiss_done_offset + 2;
parameter tlb_inelig_offset = tlb_miss_offset + 2;
parameter lrat_miss_offset = tlb_inelig_offset + 2;
parameter pt_fault_offset = lrat_miss_offset + 2;
parameter hv_priv_offset = pt_fault_offset + 2;
parameter tlb_tag5_except_offset = hv_priv_offset + 2;
parameter lru_update_clear_enab_offset = tlb_tag5_except_offset + 2;
parameter tlb_tag5_parerr_zeroize_offset = lru_update_clear_enab_offset + 1;
parameter mm_xu_ord_par_mhit_err_offset = tlb_tag5_parerr_zeroize_offset + 1;
parameter tlb_dsi_offset = mm_xu_ord_par_mhit_err_offset + 3;
parameter tlb_isi_offset = tlb_dsi_offset + 2;
parameter esr_pt_offset = tlb_isi_offset + 2;
parameter esr_data_offset = esr_pt_offset + 2;
parameter esr_epid_offset = esr_data_offset + 2;
parameter esr_st_offset = esr_epid_offset + 2;
parameter cr0_eq_offset = esr_st_offset + 2;
parameter cr0_eq_valid_offset = cr0_eq_offset + 2;
parameter tlb_multihit_err_offset = cr0_eq_valid_offset + 2;
parameter tag4_parerr_offset = tlb_multihit_err_offset + 2;
parameter tlb_par_err_offset = tag4_parerr_offset + `TLB_WAYS + 1;
parameter lru_par_err_offset = tlb_par_err_offset + 2;
parameter tlb_tag5_itag_offset = lru_par_err_offset + 2;
parameter tlb_tag5_emq_offset = tlb_tag5_itag_offset + `ITAG_SIZE_ENC;
parameter tlb_tag5_perf_offset = tlb_tag5_emq_offset + `EMQ_ENTRIES;
parameter cswitch_offset = tlb_tag5_perf_offset + 8;
parameter spare_c_offset = cswitch_offset + 8;
parameter scan_right_2 = spare_c_offset + 16 - 1;
`ifdef MM_THREADS2
parameter BUGSP_MM_THREADS = 2;
`else
parameter BUGSP_MM_THREADS = 1;
`endif
//tlb_tag3_d <= ( 0:51 epn &
// 52:65 pid &
// 66:67 IS &
// 68:69 Class &
// 70:73 state (pr,gs,as,cm) &
// 74:77 thdid &
// 78:81 size &
// 82:83 derat_miss/ierat_miss &
// 84:85 tlbsx/tlbsrx &
// 86:87 inval_snoop/tlbre &
// 88:89 tlbwe/ptereload &
// 90:97 lpid &
// 98 indirect
// 99 atsel &
// 100:102 esel &
// 103:105 hes/wq(0:1) &
// 106:107 lrat/pt &
// 108 record form
// 109 endflag
// derat,ierat,tlbsx,tlbsrx,snoop,tlbre,tlbwe,ptereload
// state: 0:pr 1:gs 2:as 3:cm
(* NO_MODIFICATION="TRUE" *)
wire [1:170] LRU_UPDATE_DATA_PT;
(* NO_MODIFICATION="TRUE" *)
wire [0:2] lru_update_data;
(* NO_MODIFICATION="TRUE" *)
wire lru_update_data_enab;
(* NO_MODIFICATION="TRUE" *)
wire lru_update_clear_enab;
(* NO_MODIFICATION="TRUE" *)
wire tlb_tag4_parerr_zeroize;
wire tlb_tag5_parerr_zeroize_q;
// Latch signals
// tag3 phase
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_way0_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_way0_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_way1_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_way1_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_way2_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_way2_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_way3_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_way3_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_TAG_WIDTH-1] tlb_tag3_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_TAG_WIDTH-1] tlb_tag3_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_TAG_WIDTH-1] tlb_tag3_clone1_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_TAG_WIDTH-1] tlb_tag3_clone1_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_TAG_WIDTH-1] tlb_tag3_clone2_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_TAG_WIDTH-1] tlb_tag3_clone2_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_ADDR_WIDTH-1] tlb_addr3_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_ADDR_WIDTH-1] tlb_addr3_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:15] lru_tag3_dataout_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:15] lru_tag3_dataout_q;
wire [0:4] tlb_tag3_cmpmask_d;
wire [0:4] tlb_tag3_cmpmask_q;
wire [0:4] tlb_tag3_cmpmask_clone_d;
wire [0:4] tlb_tag3_cmpmask_clone_q;
wire [0:4] tlb_way0_cmpmask_d;
wire [0:4] tlb_way0_cmpmask_q;
wire [0:4] tlb_way1_cmpmask_d;
wire [0:4] tlb_way1_cmpmask_q;
wire [0:4] tlb_way2_cmpmask_d;
wire [0:4] tlb_way2_cmpmask_q;
wire [0:4] tlb_way3_cmpmask_d;
wire [0:4] tlb_way3_cmpmask_q;
wire [0:4] tlb_way0_xbitmask_d;
wire [0:4] tlb_way0_xbitmask_q;
wire [0:4] tlb_way1_xbitmask_d;
wire [0:4] tlb_way1_xbitmask_q;
wire [0:4] tlb_way2_xbitmask_d;
wire [0:4] tlb_way2_xbitmask_q;
wire [0:4] tlb_way3_xbitmask_d;
wire [0:4] tlb_way3_xbitmask_q;
// tag4 phase
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_TAG_WIDTH-1] tlb_tag4_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_TAG_WIDTH-1] tlb_tag4_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAYS] tlb_tag4_wayhit_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAYS] tlb_tag4_wayhit_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_ADDR_WIDTH-1] tlb_addr4_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_ADDR_WIDTH-1] tlb_addr4_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_dataina_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_dataina_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_datainb_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_datainb_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`LRU_WIDTH-1] lru_tag4_dataout_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`LRU_WIDTH-1] lru_tag4_dataout_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_tag4_way_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_tag4_way_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_tag4_way_clone_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_tag4_way_clone_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_tag4_way_rw_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_tag4_way_rw_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_tag4_way_rw_clone_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_tag4_way_rw_clone_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAY_WIDTH-1] tlb_tag4_way_rw_or;
wire [0:`MM_THREADS] tlbwe_tag4_back_inv_d;
wire [0:`MM_THREADS] tlbwe_tag4_back_inv_q;
wire [18:19] tlbwe_tag4_back_inv_attr_d;
wire [18:19] tlbwe_tag4_back_inv_attr_q;
// tag5 phase
wire [0:2*`THDID_WIDTH+1] tlb_erat_val_d;
wire [0:2*`THDID_WIDTH+1] tlb_erat_val_q;
wire [0:`ERAT_REL_DATA_WIDTH-1] tlb_erat_rel_d;
wire [0:`ERAT_REL_DATA_WIDTH-1] tlb_erat_rel_q;
wire [0:`ERAT_REL_DATA_WIDTH-1] tlb_erat_rel_clone_d;
wire [0:`ERAT_REL_DATA_WIDTH-1] tlb_erat_rel_clone_q;
wire [0:2*`THDID_WIDTH+13] tlb_erat_dup_d /*verilator split_var*/;
wire [0:2*`THDID_WIDTH+13] tlb_erat_dup_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`LRU_WIDTH-1] lru_write_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`LRU_WIDTH-1] lru_write_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_ADDR_WIDTH-1] lru_wr_addr_d;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_ADDR_WIDTH-1] lru_wr_addr_q;
(* NO_MODIFICATION="TRUE" *)
wire [0:`LRU_WIDTH-1] lru_datain_d /*verilator split_var*/;
(* NO_MODIFICATION="TRUE" *)
wire [0:`LRU_WIDTH-1] lru_datain_q;
wire [0:`MM_THREADS-1] eratmiss_done_d;
wire [0:`MM_THREADS-1] eratmiss_done_q;
wire [0:`MM_THREADS-1] tlb_miss_d;
wire [0:`MM_THREADS-1] tlb_miss_q;
wire [0:`MM_THREADS-1] tlb_inelig_d;
wire [0:`MM_THREADS-1] tlb_inelig_q;
wire [0:`MM_THREADS-1] lrat_miss_d;
wire [0:`MM_THREADS-1] lrat_miss_q;
wire [0:`MM_THREADS-1] pt_fault_d;
wire [0:`MM_THREADS-1] pt_fault_q;
wire [0:`MM_THREADS-1] hv_priv_d;
wire [0:`MM_THREADS-1] hv_priv_q;
wire [0:`MM_THREADS-1] tlb_tag5_except_d;
wire [0:`MM_THREADS-1] tlb_tag5_except_q;
wire [0:`MM_THREADS-1] tlb_dsi_d;
wire [0:`MM_THREADS-1] tlb_dsi_q;
wire [0:`MM_THREADS-1] tlb_isi_d;
wire [0:`MM_THREADS-1] tlb_isi_q;
wire [0:`TLB_WAYS] tag4_parerr_d, tag4_parerr_q;
wire [0:`ITAG_SIZE_ENC-1] tlb_tag5_itag_d, tlb_tag5_itag_q;
wire [0:`EMQ_ENTRIES-1] tlb_tag5_emq_d, tlb_tag5_emq_q;
wire [0:1] tlb_tag5_perf_d, tlb_tag5_perf_q;
wire [10:18] mmucr1_q;
wire [10:18] mmucr1_clone_q;
wire [0:`MM_THREADS-1] esr_pt_d;
wire [0:`MM_THREADS-1] esr_pt_q;
wire [0:`MM_THREADS-1] esr_data_d;
wire [0:`MM_THREADS-1] esr_data_q;
wire [0:`MM_THREADS-1] esr_epid_d;
wire [0:`MM_THREADS-1] esr_epid_q;
wire [0:`MM_THREADS-1] esr_st_d;
wire [0:`MM_THREADS-1] esr_st_q;
wire [0:`MM_THREADS-1] tlb_multihit_err_d;
wire [0:`MM_THREADS-1] tlb_multihit_err_q;
wire [0:`MM_THREADS-1] tlb_par_err_d;
wire [0:`MM_THREADS-1] tlb_par_err_q;
wire [0:`MM_THREADS-1] lru_par_err_d;
wire [0:`MM_THREADS-1] lru_par_err_q;
wire [0:`MM_THREADS-1] cr0_eq_d;
wire [0:`MM_THREADS-1] cr0_eq_q;
wire [0:`MM_THREADS-1] cr0_eq_valid_d;
wire [0:`MM_THREADS-1] cr0_eq_valid_q;
wire [0:`MM_THREADS-1] epcr_dmiuh_q;
wire [0:`MM_THREADS-1] msr_gs_q;
wire [0:`MM_THREADS-1] msr_pr_q;
wire tlb_multihit_err_ored;
wire tlb_par_err_ored;
wire lru_par_err_ored;
wire lru_update_clear_enab_q;
wire [0:2] mm_xu_ord_par_mhit_err_d, mm_xu_ord_par_mhit_err_q;
wire [0:15] spare_a_q;
wire [0:15] spare_b_q;
wire [0:15] spare_c_q;
wire [0:7] spare_nsl_q;
wire [0:7] spare_nsl_clone_q;
wire [0:7] cswitch_q;
// Logic signals
// tag3 phase
(* NO_MODIFICATION="TRUE" *)
wire pgsize_enable;
(* NO_MODIFICATION="TRUE" *)
wire class_enable;
(* NO_MODIFICATION="TRUE" *)
wire thdid_enable;
(* NO_MODIFICATION="TRUE" *)
wire pid_enable;
(* NO_MODIFICATION="TRUE" *)
wire lpid_enable;
(* NO_MODIFICATION="TRUE" *)
wire ind_enable;
(* NO_MODIFICATION="TRUE" *)
wire iprot_enable;
(* NO_MODIFICATION="TRUE" *)
wire [0:1] state_enable;
(* NO_MODIFICATION="TRUE" *)
wire [0:1] extclass_enable;
(* NO_MODIFICATION="TRUE" *)
wire [0:8] addr_enable;
(* NO_MODIFICATION="TRUE" *)
wire comp_iprot;
wire [0:1] comp_extclass;
wire comp_ind;
(* NO_MODIFICATION="TRUE" *)
wire pgsize_enable_clone;
(* NO_MODIFICATION="TRUE" *)
wire class_enable_clone;
(* NO_MODIFICATION="TRUE" *)
wire thdid_enable_clone;
(* NO_MODIFICATION="TRUE" *)
wire pid_enable_clone;
(* NO_MODIFICATION="TRUE" *)
wire lpid_enable_clone;
(* NO_MODIFICATION="TRUE" *)
wire ind_enable_clone;
(* NO_MODIFICATION="TRUE" *)
wire iprot_enable_clone;
(* NO_MODIFICATION="TRUE" *)
wire [0:1] state_enable_clone;
(* NO_MODIFICATION="TRUE" *)
wire [0:1] extclass_enable_clone;
(* NO_MODIFICATION="TRUE" *)
wire [0:8] addr_enable_clone;
wire comp_iprot_clone;
wire [0:1] comp_extclass_clone;
wire comp_ind_clone;
wire tlbwe_tag3_back_inv_enab;
wire [0:`TLB_WAY_WIDTH-1] tlb_tag4_way_or;
wire tlb_tag4_way_act;
wire tlb_tag4_way_clone_act;
wire tlb_tag4_way_rw_act;
wire tlb_tag4_way_rw_clone_act;
// tag4 phase
wire [0:7] tlb_tag4_type_sig;
wire [0:2] tlb_tag4_esel_sig;
wire tlb_tag4_hes_sig;
wire [0:1] tlb_tag4_wq_sig;
wire [0:3] tlb_tag4_is_sig;
wire [0:`THDID_WIDTH-1] tlb_tag4_hes1_mas1_v;
wire [0:`THDID_WIDTH-1] tlb_tag4_hes0_mas1_v;
wire [0:`THDID_WIDTH-1] tlb_tag4_hes1_mas1_iprot;
wire [0:`THDID_WIDTH-1] tlb_tag4_hes0_mas1_iprot;
wire [0:`THDID_WIDTH-1] tlb_tag4_ptereload_v;
wire [0:`THDID_WIDTH-1] tlb_tag4_ptereload_iprot;
wire tlb_tag4_ptereload_sig;
wire tlb_tag4_erat_data_cap;
(* NO_MODIFICATION="TRUE" *)
wire [0:`TLB_WAYS-1] tlb_wayhit;
(* NO_MODIFICATION="TRUE" *)
wire multihit;
wire [0:2] erat_pgsize;
wire tlb_tag4_size_not_supp;
wire tlb_tag4_hv_op;
wire tlb_tag4_epcr_dgtmi;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way0_addr_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way0_pgsize_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way0_class_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way0_extclass_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way0_state_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way0_thdid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way0_pid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way0_lpid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way0_ind_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way0_iprot_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way1_addr_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way1_pgsize_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way1_class_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way1_extclass_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way1_state_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way1_thdid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way1_pid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way1_lpid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way1_ind_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way1_iprot_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way2_addr_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way2_pgsize_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way2_class_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way2_extclass_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way2_state_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way2_thdid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way2_pid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way2_lpid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way2_ind_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way2_iprot_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way3_addr_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way3_pgsize_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way3_class_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way3_extclass_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way3_state_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way3_thdid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way3_pid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way3_lpid_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way3_ind_match;
(* NO_MODIFICATION="TRUE" *)
wire tlb_way3_iprot_match;
wire ierat_req0_tag4_pid_match;
wire ierat_req0_tag4_as_match;
wire ierat_req0_tag4_gs_match;
wire ierat_req0_tag4_epn_match;
wire ierat_req0_tag4_thdid_match;
wire ierat_req1_tag4_pid_match;
wire ierat_req1_tag4_as_match;
wire ierat_req1_tag4_gs_match;
wire ierat_req1_tag4_epn_match;
wire ierat_req1_tag4_thdid_match;
wire ierat_req2_tag4_pid_match;
wire ierat_req2_tag4_as_match;
wire ierat_req2_tag4_gs_match;
wire ierat_req2_tag4_epn_match;
wire ierat_req2_tag4_thdid_match;
wire ierat_req3_tag4_pid_match;
wire ierat_req3_tag4_as_match;
wire ierat_req3_tag4_gs_match;
wire ierat_req3_tag4_epn_match;
wire ierat_req3_tag4_thdid_match;
wire ierat_iu4_tag4_lpid_match;
wire ierat_iu4_tag4_pid_match;
wire ierat_iu4_tag4_as_match;
wire ierat_iu4_tag4_gs_match;
wire ierat_iu4_tag4_epn_match;
wire ierat_iu4_tag4_thdid_match;
wire derat_req0_tag4_lpid_match;
wire derat_req0_tag4_pid_match;
wire derat_req0_tag4_as_match;
wire derat_req0_tag4_gs_match;
wire derat_req0_tag4_epn_match;
wire derat_req0_tag4_thdid_match;
wire derat_req1_tag4_lpid_match;
wire derat_req1_tag4_pid_match;
wire derat_req1_tag4_as_match;
wire derat_req1_tag4_gs_match;
wire derat_req1_tag4_epn_match;
wire derat_req1_tag4_thdid_match;
wire derat_req2_tag4_lpid_match;
wire derat_req2_tag4_pid_match;
wire derat_req2_tag4_as_match;
wire derat_req2_tag4_gs_match;
wire derat_req2_tag4_epn_match;
wire derat_req2_tag4_thdid_match;
wire derat_req3_tag4_lpid_match;
wire derat_req3_tag4_pid_match;
wire derat_req3_tag4_as_match;
wire derat_req3_tag4_gs_match;
wire derat_req3_tag4_epn_match;
wire derat_req3_tag4_thdid_match;
wire derat_ex5_tag4_lpid_match;
wire derat_ex5_tag4_pid_match;
wire derat_ex5_tag4_as_match;
wire derat_ex5_tag4_gs_match;
wire derat_ex5_tag4_epn_match;
wire derat_ex5_tag4_thdid_match;
wire [0:`THDID_WIDTH-1] ierat_tag4_dup_thdid;
wire [0:`THDID_WIDTH-1] derat_tag4_dup_thdid;
wire [0:`EMQ_ENTRIES-1] derat_tag4_dup_emq;
wire [0:9] tlb_way0_lo_calc_par;
wire [0:9] tlb_way0_hi_calc_par;
wire tlb_way0_parerr;
wire [0:9] tlb_way1_lo_calc_par;
wire [0:9] tlb_way1_hi_calc_par;
wire tlb_way1_parerr;
wire [0:9] tlb_way2_lo_calc_par;
wire [0:9] tlb_way2_hi_calc_par;
wire tlb_way2_parerr;
wire [0:9] tlb_way3_lo_calc_par;
wire [0:9] tlb_way3_hi_calc_par;
wire tlb_way3_parerr;
wire [0:1] lru_calc_par;
wire [0:`TLB_WORD_WIDTH-10-1] tlb_datain_lo_tlbwe_0_nopar;
wire [0:9] tlb_datain_lo_tlbwe_0_par;
wire [0:`TLB_WORD_WIDTH-10-1] tlb_datain_hi_hv_tlbwe_0_nopar;
wire [0:`TLB_WORD_WIDTH-10-1] tlb_datain_hi_gs_tlbwe_0_nopar;
wire [0:9] tlb_datain_hi_hv_tlbwe_0_par;
wire [0:9] tlb_datain_hi_gs_tlbwe_0_par;
`ifdef MM_THREADS2
wire [0:`TLB_WORD_WIDTH-10-1] tlb_datain_lo_tlbwe_1_nopar;
wire [0:9] tlb_datain_lo_tlbwe_1_par;
wire [0:`TLB_WORD_WIDTH-10-1] tlb_datain_hi_hv_tlbwe_1_nopar;
wire [0:`TLB_WORD_WIDTH-10-1] tlb_datain_hi_gs_tlbwe_1_nopar;
wire [0:9] tlb_datain_hi_hv_tlbwe_1_par;
wire [0:9] tlb_datain_hi_gs_tlbwe_1_par;
`endif
wire [0:`TLB_WORD_WIDTH-10-1] tlb_datain_lo_ptereload_nopar;
wire [0:9] tlb_datain_lo_ptereload_par;
wire [0:`TLB_WORD_WIDTH-10-1] tlb_datain_hi_hv_ptereload_nopar;
wire [0:`TLB_WORD_WIDTH-10-1] tlb_datain_hi_gs_ptereload_nopar;
wire [0:9] tlb_datain_hi_hv_ptereload_par;
wire [0:9] tlb_datain_hi_gs_ptereload_par;
wire [0:5] ptereload_req_derived_usxwr;
wire [22:51] lrat_tag3_lpn_sig;
wire [22:51] lrat_tag3_rpn_sig;
wire [22:51] lrat_tag4_lpn_sig;
wire [22:51] lrat_tag4_rpn_sig;
// possible eco signals
(* NO_MODIFICATION="TRUE" *)
wire [4:9] lru_datain_alt_d /*verilator split_var*/;
(* NO_MODIFICATION="TRUE" *)
wire [0:2] lru_update_data_alt;
(* NO_MODIFICATION="TRUE" *)
wire tlb_tag4_parerr_enab;
(* NO_MODIFICATION="TRUE" *)
wire tlb_tag4_tlbre_parerr;
(* NO_MODIFICATION="TRUE" *)
wire [0:2] lru_update_data_snoophit_eco;
(* NO_MODIFICATION="TRUE" *)
wire [0:2] lru_update_data_erathit_eco;
(* analysis_not_referenced="true" *)
wire [0:41] unused_dc;
wire [0:15] tri_regk_unused_scan; // spare regk non-scan latches with bogus scan ports
wire [0:`MM_THREADS-1] tri_regk_unused_scan_epcr_dmiuh;
wire [0:`MM_THREADS-1] tri_regk_unused_scan_msr_gs;
wire [0:`MM_THREADS-1] tri_regk_unused_scan_msr_pr;
// dd2 eco signals
wire ECO107332_orred_tag4_thdid_flushed;
wire [0:`MM_THREADS-1] ECO107332_tlb_par_err_d;
wire [0:`MM_THREADS-1] ECO107332_lru_par_err_d;
// Pervasive
wire pc_sg_1;
wire pc_sg_0;
wire pc_fce_1;
wire pc_fce_0;
wire pc_func_sl_thold_1;
wire pc_func_sl_thold_0;
wire pc_func_sl_thold_0_b;
wire pc_func_slp_sl_thold_1;
wire pc_func_slp_sl_thold_0;
wire pc_func_slp_sl_thold_0_b;
wire pc_func_sl_force;
wire pc_func_slp_sl_force;
wire pc_func_slp_nsl_thold_1;
wire pc_func_slp_nsl_thold_0;
wire [0:1] pc_func_slp_nsl_thold_0_b;
wire [0:1] pc_func_slp_nsl_force;
wire [0:scan_right_0] siv_0;
wire [0:scan_right_0] sov_0;
wire [0:scan_right_1] siv_1;
wire [0:scan_right_1] sov_1;
wire [0:scan_right_2] siv_2;
wire [0:scan_right_2] sov_2;
//signal reset_alias : std_ulogic;
wire tidn;
wire tiup;
//@@ START OF EXECUTABLE CODE FOR MMQ_TLB_CMP
//begin
//!! Bugspray Include: mmq_tlb_cmp;
//---------------------------------------------------------------------
// Logic
//---------------------------------------------------------------------
assign tidn = 1'b0;
assign tiup = 1'b1;
// tag2 phase signals, tlbwe/re ex4, tlbsx/srx ex5
assign tlb_addr3_d = tlb_addr2;
// latch tlb array outputs
assign tlb_way0_d = tlb_dataout[0:`TLB_WAY_WIDTH - 1];
assign tlb_way1_d = tlb_dataout[`TLB_WAY_WIDTH:2 * `TLB_WAY_WIDTH - 1];
assign tlb_way2_d = tlb_dataout[2 * `TLB_WAY_WIDTH:3 * `TLB_WAY_WIDTH - 1];
assign tlb_way3_d = tlb_dataout[3 * `TLB_WAY_WIDTH:4 * `TLB_WAY_WIDTH - 1];
// tlb_ctl may flush the thdid bits
assign tlb_tag3_d[0:`tagpos_thdid - 1] = tlb_tag2[0:`tagpos_thdid - 1];
assign tlb_tag3_d[`tagpos_thdid:`tagpos_thdid + `MM_THREADS - 1] =
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & tlb_tag4_q[`tagpos_type_ptereload] == 1'b0 & (tlb_tag4_q[`tagpos_type_ierat] == 1'b1 | tlb_tag4_q[`tagpos_type_derat] == 1'b1))) ? {`MM_THREADS{1'b0}} :
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & (tlb_tag4_q[`tagpos_type_tlbsx] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbsrx] == 1'b1))) ? {`MM_THREADS{1'b0}} :
((tlb_tag4_q[`tagpos_endflag] == 1'b1 & tlb_tag4_q[`tagpos_type_snoop] == 1'b1)) ? {`MM_THREADS{1'b0}} :
(((tlb_tag4_q[`tagpos_type_tlbre] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbwe] == 1'b1 | tlb_tag4_q[`tagpos_type_ptereload] == 1'b1) & |(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1)) ? {`MM_THREADS{1'b0}} :
tlb_tag2[`tagpos_thdid:`tagpos_thdid + `MM_THREADS - 1] & (~(tlb_ctl_tag2_flush));
generate
if (`THDID_WIDTH > `MM_THREADS)
begin : tlbtag3NExist
assign tlb_tag3_d[`tagpos_thdid + `MM_THREADS:`tagpos_thdid + `THDID_WIDTH - 1] =
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & tlb_tag4_q[`tagpos_type_ptereload] == 1'b0 & (tlb_tag4_q[`tagpos_type_ierat] == 1'b1 | tlb_tag4_q[`tagpos_type_derat] == 1'b1))) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & (tlb_tag4_q[`tagpos_type_tlbsx] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbsrx] == 1'b1))) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
((tlb_tag4_q[`tagpos_endflag] == 1'b1 & tlb_tag4_q[`tagpos_type_snoop] == 1'b1)) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
(((tlb_tag4_q[`tagpos_type_tlbre] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbwe] == 1'b1 | tlb_tag4_q[`tagpos_type_ptereload] == 1'b1) & |(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1)) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
tlb_tag2[`tagpos_thdid + `MM_THREADS:`tagpos_thdid + `THDID_WIDTH - 1];
end
endgenerate
assign tlb_tag3_d[`tagpos_thdid + `THDID_WIDTH:`TLB_TAG_WIDTH - 1] = tlb_tag2[`tagpos_thdid + `THDID_WIDTH:`TLB_TAG_WIDTH - 1];
// clones for timing arrays 0/1
assign tlb_tag3_clone1_d[0:`tagpos_thdid - 1] = tlb_tag2[0:`tagpos_thdid - 1];
assign tlb_tag3_clone1_d[`tagpos_thdid:`tagpos_thdid + `MM_THREADS - 1] =
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & tlb_tag4_q[`tagpos_type_ptereload] == 1'b0 & (tlb_tag4_q[`tagpos_type_ierat] == 1'b1 | tlb_tag4_q[`tagpos_type_derat] == 1'b1))) ? {`MM_THREADS{1'b0}} :
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & (tlb_tag4_q[`tagpos_type_tlbsx] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbsrx] == 1'b1))) ? {`MM_THREADS{1'b0}} :
((tlb_tag4_q[`tagpos_endflag] == 1'b1 & tlb_tag4_q[`tagpos_type_snoop] == 1'b1)) ? {`MM_THREADS{1'b0}} :
(((tlb_tag4_q[`tagpos_type_tlbre] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbwe] == 1'b1 | tlb_tag4_q[`tagpos_type_ptereload] == 1'b1) & |(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1)) ? {`MM_THREADS{1'b0}} :
tlb_tag2[`tagpos_thdid:`tagpos_thdid + `MM_THREADS - 1] & (~(tlb_ctl_tag2_flush));
generate
if (`THDID_WIDTH > `MM_THREADS)
begin : tlbtag3c1NExist
assign tlb_tag3_clone1_d[`tagpos_thdid + `MM_THREADS:`tagpos_thdid + `THDID_WIDTH - 1] =
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & tlb_tag4_q[`tagpos_type_ptereload] == 1'b0 & (tlb_tag4_q[`tagpos_type_ierat] == 1'b1 | tlb_tag4_q[`tagpos_type_derat] == 1'b1))) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & (tlb_tag4_q[`tagpos_type_tlbsx] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbsrx] == 1'b1))) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
((tlb_tag4_q[`tagpos_endflag] == 1'b1 & tlb_tag4_q[`tagpos_type_snoop] == 1'b1)) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
(((tlb_tag4_q[`tagpos_type_tlbre] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbwe] == 1'b1 | tlb_tag4_q[`tagpos_type_ptereload] == 1'b1) & |(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1)) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
tlb_tag2[`tagpos_thdid + `MM_THREADS:`tagpos_thdid + `THDID_WIDTH - 1];
end
endgenerate
assign tlb_tag3_clone1_d[`tagpos_thdid + `THDID_WIDTH:`TLB_TAG_WIDTH - 1] = tlb_tag2[`tagpos_thdid + `THDID_WIDTH:`TLB_TAG_WIDTH - 1];
// clones for timing arrays 2/3
assign tlb_tag3_clone2_d[0:`tagpos_thdid - 1] = tlb_tag2[0:`tagpos_thdid - 1];
assign tlb_tag3_clone2_d[`tagpos_thdid:`tagpos_thdid + `MM_THREADS - 1] =
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & tlb_tag4_q[`tagpos_type_ptereload] == 1'b0 & (tlb_tag4_q[`tagpos_type_ierat] == 1'b1 | tlb_tag4_q[`tagpos_type_derat] == 1'b1))) ? {`MM_THREADS{1'b0}} :
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & (tlb_tag4_q[`tagpos_type_tlbsx] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbsrx] == 1'b1))) ? {`MM_THREADS{1'b0}} :
((tlb_tag4_q[`tagpos_endflag] == 1'b1 & tlb_tag4_q[`tagpos_type_snoop] == 1'b1)) ? {`MM_THREADS{1'b0}} :
(((tlb_tag4_q[`tagpos_type_tlbre] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbwe] == 1'b1 | tlb_tag4_q[`tagpos_type_ptereload] == 1'b1) & |(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1)) ? {`MM_THREADS{1'b0}} :
tlb_tag2[`tagpos_thdid:`tagpos_thdid + `MM_THREADS - 1] & (~(tlb_ctl_tag2_flush));
generate
if (`THDID_WIDTH > `MM_THREADS)
begin : tlbtag3c2NExist
assign tlb_tag3_clone2_d[`tagpos_thdid + `MM_THREADS:`tagpos_thdid + `THDID_WIDTH - 1] =
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & tlb_tag4_q[`tagpos_type_ptereload] == 1'b0 & (tlb_tag4_q[`tagpos_type_ierat] == 1'b1 | tlb_tag4_q[`tagpos_type_derat] == 1'b1))) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & (tlb_tag4_q[`tagpos_type_tlbsx] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbsrx] == 1'b1))) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
((tlb_tag4_q[`tagpos_endflag] == 1'b1 & tlb_tag4_q[`tagpos_type_snoop] == 1'b1)) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
(((tlb_tag4_q[`tagpos_type_tlbre] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbwe] == 1'b1 | tlb_tag4_q[`tagpos_type_ptereload] == 1'b1) & |(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1)) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
tlb_tag2[`tagpos_thdid + `MM_THREADS:`tagpos_thdid + `THDID_WIDTH - 1];
end
endgenerate
assign tlb_tag3_clone2_d[`tagpos_thdid + `THDID_WIDTH:`TLB_TAG_WIDTH - 1] = tlb_tag2[`tagpos_thdid + `THDID_WIDTH:`TLB_TAG_WIDTH - 1];
// size tlb_tag3_cmpmask: 01234
// 1GB 11111
// 256MB 01111
// 16MB 00111
// 1MB 00011
// 64KB 00001
// 4KB 00000
assign tlb_tag3_cmpmask_d[0] = (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1GB);
assign tlb_tag3_cmpmask_d[1] = (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1GB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_256MB);
assign tlb_tag3_cmpmask_d[2] = (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1GB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_256MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_16MB);
assign tlb_tag3_cmpmask_d[3] = (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1GB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_256MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_16MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1MB);
assign tlb_tag3_cmpmask_d[4] = (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1GB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_256MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_16MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_64KB);
assign tlb_tag3_cmpmask_clone_d[0] = (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1GB);
assign tlb_tag3_cmpmask_clone_d[1] = (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1GB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_256MB);
assign tlb_tag3_cmpmask_clone_d[2] = (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1GB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_256MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_16MB);
assign tlb_tag3_cmpmask_clone_d[3] = (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1GB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_256MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_16MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1MB);
assign tlb_tag3_cmpmask_clone_d[4] = (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1GB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_256MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_16MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_1MB) | (tlb_tag2[`tagpos_size:`tagpos_size + 3] == TLB_PgSize_64KB);
// size tlb_way<n>_cmpmask: 01234
// 1GB 11111
// 256MB 01111
// 16MB 00111
// 1MB 00011
// 64KB 00001
// 4KB 00000
// size tlb_way<n>_xbitmask: 01234
// 1GB 10000
// 256MB 01000
// 16MB 00100
// 1MB 00010
// 64KB 00001
// 4KB 00000
assign tlb_way0_cmpmask_d[0] = (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB);
assign tlb_way0_cmpmask_d[1] = (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB);
assign tlb_way0_cmpmask_d[2] = (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB);
assign tlb_way0_cmpmask_d[3] = (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB) | (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB);
assign tlb_way0_cmpmask_d[4] = (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB) | (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB) | (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_64KB);
assign tlb_way0_xbitmask_d[0] = (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB);
assign tlb_way0_xbitmask_d[1] = (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB);
assign tlb_way0_xbitmask_d[2] = (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB);
assign tlb_way0_xbitmask_d[3] = (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB);
assign tlb_way0_xbitmask_d[4] = (tlb_dataout[0 * `TLB_WAY_WIDTH + `waypos_size:0 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_64KB);
assign tlb_way1_cmpmask_d[0] = (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB);
assign tlb_way1_cmpmask_d[1] = (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB);
assign tlb_way1_cmpmask_d[2] = (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB);
assign tlb_way1_cmpmask_d[3] = (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB) | (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB);
assign tlb_way1_cmpmask_d[4] = (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB) | (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB) | (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_64KB);
assign tlb_way1_xbitmask_d[0] = (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB);
assign tlb_way1_xbitmask_d[1] = (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB);
assign tlb_way1_xbitmask_d[2] = (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB);
assign tlb_way1_xbitmask_d[3] = (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB);
assign tlb_way1_xbitmask_d[4] = (tlb_dataout[1 * `TLB_WAY_WIDTH + `waypos_size:1 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_64KB);
assign tlb_way2_cmpmask_d[0] = (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB);
assign tlb_way2_cmpmask_d[1] = (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB);
assign tlb_way2_cmpmask_d[2] = (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB);
assign tlb_way2_cmpmask_d[3] = (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB) | (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB);
assign tlb_way2_cmpmask_d[4] = (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB) | (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB) | (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_64KB);
assign tlb_way2_xbitmask_d[0] = (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB);
assign tlb_way2_xbitmask_d[1] = (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB);
assign tlb_way2_xbitmask_d[2] = (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB);
assign tlb_way2_xbitmask_d[3] = (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB);
assign tlb_way2_xbitmask_d[4] = (tlb_dataout[2 * `TLB_WAY_WIDTH + `waypos_size:2 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_64KB);
assign tlb_way3_cmpmask_d[0] = (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB);
assign tlb_way3_cmpmask_d[1] = (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB);
assign tlb_way3_cmpmask_d[2] = (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB);
assign tlb_way3_cmpmask_d[3] = (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB) | (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB);
assign tlb_way3_cmpmask_d[4] = (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB) | (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB) | (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB) | (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB) | (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_64KB);
assign tlb_way3_xbitmask_d[0] = (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1GB);
assign tlb_way3_xbitmask_d[1] = (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_256MB);
assign tlb_way3_xbitmask_d[2] = (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_16MB);
assign tlb_way3_xbitmask_d[3] = (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_1MB);
assign tlb_way3_xbitmask_d[4] = (tlb_dataout[3 * `TLB_WAY_WIDTH + `waypos_size:3 * `TLB_WAY_WIDTH + `waypos_size + 3] == TLB_PgSize_64KB);
// TLB Parity Checking
assign tlb_way0_lo_calc_par[0] = ^(tlb_way0_q[0:7]);
assign tlb_way0_lo_calc_par[1] = ^(tlb_way0_q[8:15]);
assign tlb_way0_lo_calc_par[2] = ^(tlb_way0_q[16:23]);
assign tlb_way0_lo_calc_par[3] = ^(tlb_way0_q[24:31]);
assign tlb_way0_lo_calc_par[4] = ^(tlb_way0_q[32:39]);
assign tlb_way0_lo_calc_par[5] = ^(tlb_way0_q[40:47]);
assign tlb_way0_lo_calc_par[6] = ^(tlb_way0_q[48:51]);
assign tlb_way0_lo_calc_par[7] = ^(tlb_way0_q[52:59]);
assign tlb_way0_lo_calc_par[8] = ^(tlb_way0_q[60:65]);
assign tlb_way0_lo_calc_par[9] = ^(tlb_way0_q[66:73]);
assign tlb_way1_lo_calc_par[0] = ^(tlb_way1_q[0:7]);
assign tlb_way1_lo_calc_par[1] = ^(tlb_way1_q[8:15]);
assign tlb_way1_lo_calc_par[2] = ^(tlb_way1_q[16:23]);
assign tlb_way1_lo_calc_par[3] = ^(tlb_way1_q[24:31]);
assign tlb_way1_lo_calc_par[4] = ^(tlb_way1_q[32:39]);
assign tlb_way1_lo_calc_par[5] = ^(tlb_way1_q[40:47]);
assign tlb_way1_lo_calc_par[6] = ^(tlb_way1_q[48:51]);
assign tlb_way1_lo_calc_par[7] = ^(tlb_way1_q[52:59]);
assign tlb_way1_lo_calc_par[8] = ^(tlb_way1_q[60:65]);
assign tlb_way1_lo_calc_par[9] = ^(tlb_way1_q[66:73]);
assign tlb_way2_lo_calc_par[0] = ^(tlb_way2_q[0:7]);
assign tlb_way2_lo_calc_par[1] = ^(tlb_way2_q[8:15]);
assign tlb_way2_lo_calc_par[2] = ^(tlb_way2_q[16:23]);
assign tlb_way2_lo_calc_par[3] = ^(tlb_way2_q[24:31]);
assign tlb_way2_lo_calc_par[4] = ^(tlb_way2_q[32:39]);
assign tlb_way2_lo_calc_par[5] = ^(tlb_way2_q[40:47]);
assign tlb_way2_lo_calc_par[6] = ^(tlb_way2_q[48:51]);
assign tlb_way2_lo_calc_par[7] = ^(tlb_way2_q[52:59]);
assign tlb_way2_lo_calc_par[8] = ^(tlb_way2_q[60:65]);
assign tlb_way2_lo_calc_par[9] = ^(tlb_way2_q[66:73]);
assign tlb_way3_lo_calc_par[0] = ^(tlb_way3_q[0:7]);
assign tlb_way3_lo_calc_par[1] = ^(tlb_way3_q[8:15]);
assign tlb_way3_lo_calc_par[2] = ^(tlb_way3_q[16:23]);
assign tlb_way3_lo_calc_par[3] = ^(tlb_way3_q[24:31]);
assign tlb_way3_lo_calc_par[4] = ^(tlb_way3_q[32:39]);
assign tlb_way3_lo_calc_par[5] = ^(tlb_way3_q[40:47]);
assign tlb_way3_lo_calc_par[6] = ^(tlb_way3_q[48:51]);
assign tlb_way3_lo_calc_par[7] = ^(tlb_way3_q[52:59]);
assign tlb_way3_lo_calc_par[8] = ^(tlb_way3_q[60:65]);
assign tlb_way3_lo_calc_par[9] = ^(tlb_way3_q[66:73]);
assign tlb_way0_hi_calc_par[0] = ^(tlb_way0_q[`TLB_WORD_WIDTH + 0:`TLB_WORD_WIDTH + 7]);
assign tlb_way0_hi_calc_par[1] = ^(tlb_way0_q[`TLB_WORD_WIDTH + 8:`TLB_WORD_WIDTH + 15]);
assign tlb_way0_hi_calc_par[2] = ^(tlb_way0_q[`TLB_WORD_WIDTH + 16:`TLB_WORD_WIDTH + 23]);
assign tlb_way0_hi_calc_par[3] = ^(tlb_way0_q[`TLB_WORD_WIDTH + 24:`TLB_WORD_WIDTH + 31]);
assign tlb_way0_hi_calc_par[4] = ^(tlb_way0_q[`TLB_WORD_WIDTH + 32:`TLB_WORD_WIDTH + 39]);
assign tlb_way0_hi_calc_par[5] = ^(tlb_way0_q[`TLB_WORD_WIDTH + 40:`TLB_WORD_WIDTH + 44]);
assign tlb_way0_hi_calc_par[6] = ^(tlb_way0_q[`TLB_WORD_WIDTH + 45:`TLB_WORD_WIDTH + 49]);
assign tlb_way0_hi_calc_par[7] = ^(tlb_way0_q[`TLB_WORD_WIDTH + 50:`TLB_WORD_WIDTH + 57]);
assign tlb_way0_hi_calc_par[8] = ^(tlb_way0_q[`TLB_WORD_WIDTH + 58:`TLB_WORD_WIDTH + 65]);
assign tlb_way0_hi_calc_par[9] = ^(tlb_way0_q[`TLB_WORD_WIDTH + 66:`TLB_WORD_WIDTH + 73]);
assign tlb_way1_hi_calc_par[0] = ^(tlb_way1_q[`TLB_WORD_WIDTH + 0:`TLB_WORD_WIDTH + 7]);
assign tlb_way1_hi_calc_par[1] = ^(tlb_way1_q[`TLB_WORD_WIDTH + 8:`TLB_WORD_WIDTH + 15]);
assign tlb_way1_hi_calc_par[2] = ^(tlb_way1_q[`TLB_WORD_WIDTH + 16:`TLB_WORD_WIDTH + 23]);
assign tlb_way1_hi_calc_par[3] = ^(tlb_way1_q[`TLB_WORD_WIDTH + 24:`TLB_WORD_WIDTH + 31]);
assign tlb_way1_hi_calc_par[4] = ^(tlb_way1_q[`TLB_WORD_WIDTH + 32:`TLB_WORD_WIDTH + 39]);
assign tlb_way1_hi_calc_par[5] = ^(tlb_way1_q[`TLB_WORD_WIDTH + 40:`TLB_WORD_WIDTH + 44]);
assign tlb_way1_hi_calc_par[6] = ^(tlb_way1_q[`TLB_WORD_WIDTH + 45:`TLB_WORD_WIDTH + 49]);
assign tlb_way1_hi_calc_par[7] = ^(tlb_way1_q[`TLB_WORD_WIDTH + 50:`TLB_WORD_WIDTH + 57]);
assign tlb_way1_hi_calc_par[8] = ^(tlb_way1_q[`TLB_WORD_WIDTH + 58:`TLB_WORD_WIDTH + 65]);
assign tlb_way1_hi_calc_par[9] = ^(tlb_way1_q[`TLB_WORD_WIDTH + 66:`TLB_WORD_WIDTH + 73]);
assign tlb_way2_hi_calc_par[0] = ^(tlb_way2_q[`TLB_WORD_WIDTH + 0:`TLB_WORD_WIDTH + 7]);
assign tlb_way2_hi_calc_par[1] = ^(tlb_way2_q[`TLB_WORD_WIDTH + 8:`TLB_WORD_WIDTH + 15]);
assign tlb_way2_hi_calc_par[2] = ^(tlb_way2_q[`TLB_WORD_WIDTH + 16:`TLB_WORD_WIDTH + 23]);
assign tlb_way2_hi_calc_par[3] = ^(tlb_way2_q[`TLB_WORD_WIDTH + 24:`TLB_WORD_WIDTH + 31]);
assign tlb_way2_hi_calc_par[4] = ^(tlb_way2_q[`TLB_WORD_WIDTH + 32:`TLB_WORD_WIDTH + 39]);
assign tlb_way2_hi_calc_par[5] = ^(tlb_way2_q[`TLB_WORD_WIDTH + 40:`TLB_WORD_WIDTH + 44]);
assign tlb_way2_hi_calc_par[6] = ^(tlb_way2_q[`TLB_WORD_WIDTH + 45:`TLB_WORD_WIDTH + 49]);
assign tlb_way2_hi_calc_par[7] = ^(tlb_way2_q[`TLB_WORD_WIDTH + 50:`TLB_WORD_WIDTH + 57]);
assign tlb_way2_hi_calc_par[8] = ^(tlb_way2_q[`TLB_WORD_WIDTH + 58:`TLB_WORD_WIDTH + 65]);
assign tlb_way2_hi_calc_par[9] = ^(tlb_way2_q[`TLB_WORD_WIDTH + 66:`TLB_WORD_WIDTH + 73]);
assign tlb_way3_hi_calc_par[0] = ^(tlb_way3_q[`TLB_WORD_WIDTH + 0:`TLB_WORD_WIDTH + 7]);
assign tlb_way3_hi_calc_par[1] = ^(tlb_way3_q[`TLB_WORD_WIDTH + 8:`TLB_WORD_WIDTH + 15]);
assign tlb_way3_hi_calc_par[2] = ^(tlb_way3_q[`TLB_WORD_WIDTH + 16:`TLB_WORD_WIDTH + 23]);
assign tlb_way3_hi_calc_par[3] = ^(tlb_way3_q[`TLB_WORD_WIDTH + 24:`TLB_WORD_WIDTH + 31]);
assign tlb_way3_hi_calc_par[4] = ^(tlb_way3_q[`TLB_WORD_WIDTH + 32:`TLB_WORD_WIDTH + 39]);
assign tlb_way3_hi_calc_par[5] = ^(tlb_way3_q[`TLB_WORD_WIDTH + 40:`TLB_WORD_WIDTH + 44]);
assign tlb_way3_hi_calc_par[6] = ^(tlb_way3_q[`TLB_WORD_WIDTH + 45:`TLB_WORD_WIDTH + 49]);
assign tlb_way3_hi_calc_par[7] = ^(tlb_way3_q[`TLB_WORD_WIDTH + 50:`TLB_WORD_WIDTH + 57]);
assign tlb_way3_hi_calc_par[8] = ^(tlb_way3_q[`TLB_WORD_WIDTH + 58:`TLB_WORD_WIDTH + 65]);
assign tlb_way3_hi_calc_par[9] = ^(tlb_way3_q[`TLB_WORD_WIDTH + 66:`TLB_WORD_WIDTH + 73]);
assign tlb_way0_parerr = |(tlb_way0_lo_calc_par[0:9] ^ tlb_way0_q[74:83]) | |(tlb_way0_hi_calc_par[0:9] ^ tlb_way0_q[`TLB_WORD_WIDTH + 74:`TLB_WORD_WIDTH + 83]);
assign tag4_parerr_d[0] = tlb_way0_parerr;
assign tlb_way1_parerr = |(tlb_way1_lo_calc_par[0:9] ^ tlb_way1_q[74:83]) | |(tlb_way1_hi_calc_par[0:9] ^ tlb_way1_q[`TLB_WORD_WIDTH + 74:`TLB_WORD_WIDTH + 83]);
assign tag4_parerr_d[1] = tlb_way1_parerr;
assign tlb_way2_parerr = |(tlb_way2_lo_calc_par[0:9] ^ tlb_way2_q[74:83]) | |(tlb_way2_hi_calc_par[0:9] ^ tlb_way2_q[`TLB_WORD_WIDTH + 74:`TLB_WORD_WIDTH + 83]);
assign tag4_parerr_d[2] = tlb_way2_parerr;
assign tlb_way3_parerr = |(tlb_way3_lo_calc_par[0:9] ^ tlb_way3_q[74:83]) | |(tlb_way3_hi_calc_par[0:9] ^ tlb_way3_q[`TLB_WORD_WIDTH + 74:`TLB_WORD_WIDTH + 83]);
assign tag4_parerr_d[3] = tlb_way3_parerr;
// end of TLB Parity Checking
assign tlb_tag4_parerr_write = ((xu_mm_xucr4_mmu_mchk_q == 1'b0 & xu_mm_ccr2_notlb_b == 1'b1 &
((tlb_tag4_q[`tagpos_type_derat] == 1'b1 | tlb_tag4_q[`tagpos_type_ierat] == 1'b1) & tlb_tag4_q[`tagpos_type_ptereload] == 1'b0) &
|(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1 & tlb_tag4_q[`tagpos_nonspec] == 1'b1 )) ? tag4_parerr_q[0:`TLB_WAYS-1] :
`TLB_WAYS'b0;
assign tlb_tag4_parerr_zeroize = ((xu_mm_xucr4_mmu_mchk_q == 1'b0 & xu_mm_ccr2_notlb_b == 1'b1 &
((tlb_tag4_q[`tagpos_type_derat] == 1'b1 | tlb_tag4_q[`tagpos_type_ierat] == 1'b1) & tlb_tag4_q[`tagpos_type_ptereload] == 1'b0) &
|(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1 & tlb_tag4_q[`tagpos_nonspec] == 1'b1 )) ? |(tag4_parerr_q[0:`TLB_WAYS-1]) :
1'b0;
assign tlb_tag5_parerr_zeroize = tlb_tag5_parerr_zeroize_q;
// lru data format
// 0:3 - valid(0:3)
// 4:6 - LRU
// 7 - parity
// 8:11 - iprot(0:3)
// 12:14 - reserved
// 15 - parity
assign lru_tag3_dataout_d = lru_dataout;
// tag3 phase signals, tlbwe/re ex5, tlbsx/srx ex6
// tlb_ctl may flush the thdid bits
assign tlb_tag4_d[0:`tagpos_thdid - 1] = tlb_tag3_q[0:`tagpos_thdid - 1];
assign tlb_tag4_d[`tagpos_thdid:`tagpos_thdid + `MM_THREADS - 1] =
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & tlb_tag4_q[`tagpos_type_ptereload] == 1'b0 & (tlb_tag4_q[`tagpos_type_ierat] == 1'b1 | tlb_tag4_q[`tagpos_type_derat] == 1'b1))) ? {`MM_THREADS{1'b0}} :
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & (tlb_tag4_q[`tagpos_type_tlbsx] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbsrx] == 1'b1))) ? {`MM_THREADS{1'b0}} :
((tlb_tag4_q[`tagpos_endflag] == 1'b1 & tlb_tag4_q[`tagpos_type_snoop] == 1'b1)) ? {`MM_THREADS{1'b0}} :
(((tlb_tag4_q[`tagpos_type_tlbre] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbwe] == 1'b1 | tlb_tag4_q[`tagpos_type_ptereload] == 1'b1) & |(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1)) ? {`MM_THREADS{1'b0}} :
tlb_tag3_q[`tagpos_thdid:`tagpos_thdid + `MM_THREADS - 1] & (~(tlb_ctl_tag3_flush));
generate
if (`THDID_WIDTH > `MM_THREADS)
begin : tlbtag4NExist
assign tlb_tag4_d[`tagpos_thdid + `MM_THREADS:`tagpos_thdid + `THDID_WIDTH - 1] =
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & tlb_tag4_q[`tagpos_type_ptereload] == 1'b0 & (tlb_tag4_q[`tagpos_type_ierat] == 1'b1 | tlb_tag4_q[`tagpos_type_derat] == 1'b1))) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
(((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b1 | tlb_tag4_q[`tagpos_endflag] == 1'b1 | |(tag4_parerr_q[0:4]) == 1'b1) & (tlb_tag4_q[`tagpos_type_tlbsx] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbsrx] == 1'b1))) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
((tlb_tag4_q[`tagpos_endflag] == 1'b1 & tlb_tag4_q[`tagpos_type_snoop] == 1'b1)) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
(((tlb_tag4_q[`tagpos_type_tlbre] == 1'b1 | tlb_tag4_q[`tagpos_type_tlbwe] == 1'b1 | tlb_tag4_q[`tagpos_type_ptereload] == 1'b1) & |(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1)) ? {`THDID_WIDTH-`MM_THREADS{1'b0}} :
tlb_tag3_q[`tagpos_thdid + `MM_THREADS:`tagpos_thdid + `THDID_WIDTH - 1];
end
endgenerate
assign tlb_tag4_d[`tagpos_thdid + `THDID_WIDTH:`TLB_TAG_WIDTH - 1] = tlb_tag3_q[`tagpos_thdid + `THDID_WIDTH:`TLB_TAG_WIDTH - 1];
assign tlb_addr4_d = tlb_addr3_q;
// chosen way logic
// `tagpos_type_derat,ierat,tlbsx,tlbsrx,snoop,tlbre,tlbwe,ptereload
// (ierat or derat) ptereload (tlbsx or tlbsrx) tlbre tlbwe tlb_wayhit MAS0.HES MAS0.ESEL old_lru tag4_way
// 1 0 x x x 0 x x x 0
// 1 0 x x x 1 x x x 1
// 1 0 x x x 2 x x x 2
// 1 0 x x x 3 x x x 3
// x 0 1 x x 0 x x x 0
// x 0 1 x x 1 x x x 1
// x 0 1 x x 2 x x x 2
// x 0 1 x x 3 x x x 3
// x x x 1 x x x 0 x 0
// x x x 1 x x x 1 x 1
// x x x 1 x x x 2 x 2
// x x x 1 x x x 3 x 3
// x x x x 1 x 0 0 x 0
// x x x x 1 x 0 1 x 1
// x x x x 1 x 0 2 x 2
// x x x x 1 x 0 3 x 3
// x x x x 1 x 1 x 0 0
// x x x x 1 x 1 x 1 1
// x x x x 1 x 1 x 2 2
// x x x x 1 x 1 x 3 3
// x 1 x x x x x x 0 0
// x 1 x x x x x x 1 1
// x 1 x x x x x x 2 2
// x 1 x x x x x x 3 3
assign tlb_tag4_way_d = (tlb_way0_q & {`TLB_WAY_WIDTH{tlb_wayhit[0]}}) | (tlb_way1_q & {`TLB_WAY_WIDTH{tlb_wayhit[1]}});
assign tlb_tag4_way_clone_d = (tlb_way2_q & {`TLB_WAY_WIDTH{tlb_wayhit[2]}}) | (tlb_way3_q & {`TLB_WAY_WIDTH{tlb_wayhit[3]}});
assign tlb_tag4_way_or = tlb_tag4_way_q | tlb_tag4_way_clone_q;
assign tlb_tag4_way_rw_d = ( tlb_way0_q & ( {`TLB_WAY_WIDTH{(~tlb_tag3_clone1_q[`tagpos_esel + 1]) & (~tlb_tag3_clone1_q[`tagpos_esel + 2]) & |(tlb_tag3_clone1_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) &
(tlb_tag3_clone1_q[`tagpos_type_tlbre] | (tlb_tag3_clone1_q[`tagpos_type_tlbwe] & (~tlb_tag3_clone1_q[`tagpos_hes])))}} ) ) |
( tlb_way1_q & ( {`TLB_WAY_WIDTH{(~tlb_tag3_clone1_q[`tagpos_esel + 1]) & tlb_tag3_clone1_q[`tagpos_esel + 2] & |(tlb_tag3_clone1_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) &
(tlb_tag3_clone1_q[`tagpos_type_tlbre] | (tlb_tag3_clone1_q[`tagpos_type_tlbwe] & (~tlb_tag3_clone1_q[`tagpos_hes])))}} ) ) |
( tlb_way0_q & ( {`TLB_WAY_WIDTH{(~lru_tag3_dataout_q[4]) & (~lru_tag3_dataout_q[5]) & |(tlb_tag3_clone1_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) &
(tlb_tag3_clone1_q[`tagpos_type_ptereload] | (tlb_tag3_clone1_q[`tagpos_type_tlbwe] & tlb_tag3_clone1_q[`tagpos_hes]))}} ) ) |
( tlb_way1_q & ( {`TLB_WAY_WIDTH{(~lru_tag3_dataout_q[4]) & lru_tag3_dataout_q[5] & |(tlb_tag3_clone1_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) &
(tlb_tag3_clone1_q[`tagpos_type_ptereload] | (tlb_tag3_clone1_q[`tagpos_type_tlbwe] & tlb_tag3_clone1_q[`tagpos_hes]))}} ) );
assign tlb_tag4_way_rw_clone_d = ( tlb_way2_q & ( {`TLB_WAY_WIDTH{tlb_tag3_clone2_q[`tagpos_esel + 1] & (~tlb_tag3_clone2_q[`tagpos_esel + 2]) & |(tlb_tag3_clone2_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) &
(tlb_tag3_clone2_q[`tagpos_type_tlbre] | (tlb_tag3_clone2_q[`tagpos_type_tlbwe] & (~tlb_tag3_clone2_q[`tagpos_hes])))}} ) ) |
( tlb_way3_q & ( {`TLB_WAY_WIDTH{tlb_tag3_clone2_q[`tagpos_esel + 1] & tlb_tag3_clone2_q[`tagpos_esel + 2] & |(tlb_tag3_clone2_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) &
(tlb_tag3_clone2_q[`tagpos_type_tlbre] | (tlb_tag3_clone2_q[`tagpos_type_tlbwe] & (~tlb_tag3_clone2_q[`tagpos_hes])))}} ) ) |
( tlb_way2_q & ( {`TLB_WAY_WIDTH{lru_tag3_dataout_q[4] & (~lru_tag3_dataout_q[6]) & |(tlb_tag3_clone2_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) &
(tlb_tag3_clone2_q[`tagpos_type_ptereload] | (tlb_tag3_clone2_q[`tagpos_type_tlbwe] & tlb_tag3_clone2_q[`tagpos_hes]))}} ) ) |
( tlb_way3_q & ( {`TLB_WAY_WIDTH{lru_tag3_dataout_q[4] & lru_tag3_dataout_q[6] & |(tlb_tag3_clone2_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) &
(tlb_tag3_clone2_q[`tagpos_type_ptereload] | (tlb_tag3_clone2_q[`tagpos_type_tlbwe] & tlb_tag3_clone2_q[`tagpos_hes]))}} ) );
assign tlb_tag4_way_rw_or = tlb_tag4_way_rw_q | tlb_tag4_way_rw_clone_q;
assign tlb_tag4_wayhit_d[0:`TLB_WAYS - 1] = tlb_wayhit[0:`TLB_WAYS - 1];
assign tlb_tag4_wayhit_d[`TLB_WAYS] = ((tlb_tag4_wayhit_q[`TLB_WAYS] == 1'b0 & |(tlb_wayhit[0:`TLB_WAYS - 1]) == 1'b1 & |(tlb_tag3_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]) == 1'b1)) ? 1'b1 :
1'b0;
assign tlb_tag4_way_act = (|(tlb_tag3_clone1_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1])) & (~(tlb_tag4_wayhit_q[`TLB_WAYS])) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload]) &
(tlb_tag3_clone1_q[`tagpos_type_derat] | tlb_tag3_clone1_q[`tagpos_type_ierat] | tlb_tag3_clone1_q[`tagpos_type_tlbsx] | tlb_tag3_clone1_q[`tagpos_type_tlbsrx]);
assign tlb_tag4_way_clone_act = (|(tlb_tag3_clone2_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1])) & (~(tlb_tag4_wayhit_q[`TLB_WAYS])) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload]) &
(tlb_tag3_clone2_q[`tagpos_type_derat] | tlb_tag3_clone2_q[`tagpos_type_ierat] | tlb_tag3_clone2_q[`tagpos_type_tlbsx] | tlb_tag3_clone2_q[`tagpos_type_tlbsrx]);
assign tlb_tag4_way_rw_act = (|(tlb_tag3_clone1_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1])) &
(tlb_tag3_clone1_q[`tagpos_type_tlbre] | tlb_tag3_clone1_q[`tagpos_type_tlbwe] | tlb_tag3_clone1_q[`tagpos_type_ptereload]);
assign tlb_tag4_way_rw_clone_act = (|(tlb_tag3_clone2_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1])) &
(tlb_tag3_clone2_q[`tagpos_type_tlbre] | tlb_tag3_clone2_q[`tagpos_type_tlbwe] | tlb_tag3_clone2_q[`tagpos_type_ptereload]);
assign lru_tag4_dataout_d = lru_tag3_dataout_q;
//tlb_tag3_d <= ( 0:51 epn &
// 52:65 pid &
// 66:67 IS &
// 68:69 Class &
// 70:73 state (pr,gs,as,cm) &
// 74:77 thdid &
// 78:81 size &
// 82:83 derat_miss/ierat_miss &
// 84:85 tlbsx/tlbsrx &
// 86:87 inval_snoop/tlbre &
// 88:89 tlbwe/ptereload &
// 90:97 lpid &
// 98 indirect
// 99 atsel &
// 100:102 esel &
// 103:105 hes/wq(0:1) &
// 106:107 lrat/pt &
// 108 record form
// 109 endflag
// `tagpos_epn : natural := 0;
// `tagpos_pid : natural := 52; -- 14 bits
// `tagpos_is : natural := 66;
// `tagpos_class : natural := 68;
// `tagpos_state : natural := 70; -- state: 0:pr 1:gs 2:as 3:cm
// `tagpos_thdid : natural := 74;
// `tagpos_size : natural := 78;
// `tagpos_type : natural := 82; -- derat,ierat,tlbsx,tlbsrx,snoop,tlbre,tlbwe,ptereload
// `tagpos_lpid : natural := 90;
// `tagpos_ind : natural := 98;
// `tagpos_atsel : natural := 99;
// `tagpos_esel : natural := 100;
// `tagpos_hes : natural := 103;
// `tagpos_wq : natural := 104;
// `tagpos_lrat : natural := 106;
// `tagpos_pt : natural := 107;
// `tagpos_recform : natural := 108;
// `tagpos_endflag : natural := 109;
// For snoop ttypes...
// `tagpos_is -> IS(0): Local snoop
// `tagpos_is+1 to `tagpos_is+3 -> IS(1)/Class: 0=all in lpar, 1=tid, 2=gs, 3=vpn, 4=class0, 5=class1, 6=class2, 7=class3
// bits 0-7: override for chunks of msb of address for bus snoops, depends on pgsize and mmucr1.tlbi_msb bit
// mmucr1 11-LRUPEI, 12:13-ICTID/ITTID, 14:15-DCTID/DTTID, 16-DCCD, 17-TLBWE_BINV, 18-TLBI_MSB
// size tlb_tag3_cmpmask_q: 01234
// 1GB 11111
// 256MB 01111
// 16MB 00111
// 1MB 00011
// 64KB 00001
// 4KB 00000
assign addr_enable[0] = (|(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b1011));
assign addr_enable[1] = (|(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_q[pos_tlbi_msb] & tlb_tag3_cmpmask_q[0]);
assign addr_enable[2] = (|(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_q[pos_tlbi_msb] & tlb_tag3_cmpmask_q[1]);
assign addr_enable[3] = (|(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_q[pos_tlbi_msb] & tlb_tag3_cmpmask_q[1]) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & (~mmucr1_q[pos_tlbi_msb]) & tlb_tag3_cmpmask_q[0]);
assign addr_enable[4] = (|(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_q[pos_tlbi_msb] & tlb_tag3_cmpmask_q[2]) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & (~mmucr1_q[pos_tlbi_msb]) & tlb_tag3_cmpmask_q[1]);
assign addr_enable[5] = (|(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_q[pos_tlbi_msb] & tlb_tag3_cmpmask_q[3]) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & (~mmucr1_q[pos_tlbi_msb]) & tlb_tag3_cmpmask_q[2]);
assign addr_enable[6] = (|(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_q[pos_tlbi_msb]) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & (~mmucr1_q[pos_tlbi_msb]) & tlb_tag3_cmpmask_q[3]);
assign addr_enable[7] = (|(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011));
// bit 8: override to ignore all address bits
assign addr_enable[8] = (|(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011));
assign class_enable = ((tlb_tag3_clone1_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone1_q[`tagpos_is + 1] == 1'b1)) ? 1'b1 :
1'b0;
assign pgsize_enable = tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011);
assign extclass_enable = 2'b00;
// `tagpos_type : natural := 82; -- derat,ierat,tlbsx,tlbsrx,snoop,tlbre,tlbwe,ptereload
//thdid_enable <= '1' when (tlb_tag3_clone1_q(`tagpos_type_derat to `tagpos_type_ierat) /= 00 and tlb_tag3_clone1_q(`tagpos_type_ptereload)='0')
// else '0'; -- derat,ierat
assign thdid_enable = (|(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx])) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload]);
assign pid_enable = ((tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx] != 4'b0000 & tlb_tag3_clone1_q[`tagpos_type_ptereload] == 1'b0)) ? 1'b1 :
((tlb_tag3_clone1_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b001)) ? 1'b1 :
((tlb_tag3_clone1_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011)) ? 1'b1 :
1'b0;
// gs enable
assign state_enable[0] = ((tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx] != 4'b0000 & tlb_tag3_clone1_q[`tagpos_type_ptereload] == 1'b0)) ? 1'b1 :
((tlb_tag3_clone1_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b010)) ? 1'b1 :
((tlb_tag3_clone1_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011)) ? 1'b1 :
1'b0;
// as enable
assign state_enable[1] = ((tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx] != 4'b0000 & tlb_tag3_clone1_q[`tagpos_type_ptereload] == 1'b0)) ? 1'b1 :
((tlb_tag3_clone1_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011)) ? 1'b1 :
1'b0;
assign lpid_enable = ((tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx] != 4'b0000 & tlb_tag3_clone1_q[`tagpos_type_ptereload] == 1'b0)) ? 1'b1 :
((tlb_tag3_clone1_q[`tagpos_type_snoop] == 1'b1)) ? (~(tlb_tag3_clone1_q[`tagpos_hes])) :
1'b0;
assign ind_enable = ( |(tlb_tag3_clone1_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone1_q[`tagpos_type_ptereload]) ) |
( tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011) ) |
( tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b001) & tlb_tag3_clone1_q[`tagpos_ind] );
assign iprot_enable = tlb_tag3_clone1_q[`tagpos_type_snoop];
// For snoop ttypes...
// `tagpos_is -> IS(0): Local snoop
// `tagpos_is+1 to `tagpos_is+3 -> IS(1)/Class: 0=all in lpar, 1=tid, 2=gs, 3=vpn, 4=class0, 5=class1, 6=class2, 7=class3
assign comp_extclass = 2'b00;
assign comp_iprot = 1'b0;
// added for ISA v2.06 addendum: tlbilx T=1 by pid, use mas6.sind as ind bit compare enable, compare value=0
assign comp_ind = tlb_tag3_clone1_q[`tagpos_ind] & (~(tlb_tag3_clone1_q[`tagpos_type_snoop] & (tlb_tag3_clone1_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b001)));
//----------------- cloned compare logic, for timing: tlb array 0/1 on set above, tlb array 2/3 on set below
assign addr_enable_clone[0] = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b1011));
assign addr_enable_clone[1] = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_clone_q[pos_tlbi_msb] & tlb_tag3_cmpmask_clone_q[0]);
assign addr_enable_clone[2] = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_clone_q[pos_tlbi_msb] & tlb_tag3_cmpmask_clone_q[1]);
assign addr_enable_clone[3] = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_clone_q[pos_tlbi_msb] & tlb_tag3_cmpmask_clone_q[1]) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & (~mmucr1_clone_q[pos_tlbi_msb]) & tlb_tag3_cmpmask_clone_q[0]);
assign addr_enable_clone[4] = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_clone_q[pos_tlbi_msb] & tlb_tag3_cmpmask_clone_q[2]) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & (~mmucr1_clone_q[pos_tlbi_msb]) & tlb_tag3_cmpmask_clone_q[1]);
assign addr_enable_clone[5] = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_clone_q[pos_tlbi_msb] & tlb_tag3_cmpmask_clone_q[3]) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & (~mmucr1_clone_q[pos_tlbi_msb]) & tlb_tag3_cmpmask_clone_q[2]);
assign addr_enable_clone[6] = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b1011)) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & mmucr1_clone_q[pos_tlbi_msb]) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is:`tagpos_is + 3] == 4'b0011) & (~mmucr1_clone_q[pos_tlbi_msb]) & tlb_tag3_cmpmask_clone_q[3]);
assign addr_enable_clone[7] = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011));
// bit 8: override to ignore all address bits
assign addr_enable_clone[8] = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011));
assign class_enable_clone = ((tlb_tag3_clone2_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone2_q[`tagpos_is + 1] == 1'b1)) ? 1'b1 :
1'b0;
assign pgsize_enable_clone = tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011);
assign extclass_enable_clone = 2'b00;
// `tagpos_type : natural := 82; -- derat,ierat,tlbsx,tlbsrx,snoop,tlbre,tlbwe,ptereload
assign thdid_enable_clone = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx])) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload]);
assign pid_enable_clone = ((tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx] != 4'b0000 & tlb_tag3_clone2_q[`tagpos_type_ptereload] == 1'b0)) ? 1'b1 :
((tlb_tag3_clone2_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b001)) ? 1'b1 :
((tlb_tag3_clone2_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011)) ? 1'b1 :
1'b0;
// gs enable
assign state_enable_clone[0] = ((tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx] != 4'b0000 & tlb_tag3_clone2_q[`tagpos_type_ptereload] == 1'b0)) ? 1'b1 :
((tlb_tag3_clone2_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b010)) ? 1'b1 :
((tlb_tag3_clone2_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011)) ? 1'b1 :
1'b0;
// as enable
assign state_enable_clone[1] = ((tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx] != 4'b0000 & tlb_tag3_clone2_q[`tagpos_type_ptereload] == 1'b0)) ? 1'b1 :
((tlb_tag3_clone2_q[`tagpos_type_snoop] == 1'b1 & tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011)) ? 1'b1 :
1'b0;
assign lpid_enable_clone = ((tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx] != 4'b0000 & tlb_tag3_clone2_q[`tagpos_type_ptereload] == 1'b0)) ? 1'b1 :
((tlb_tag3_clone2_q[`tagpos_type_snoop] == 1'b1)) ? (~(tlb_tag3_clone2_q[`tagpos_hes])) :
1'b0;
assign ind_enable_clone = (|(tlb_tag3_clone2_q[`tagpos_type_derat:`tagpos_type_tlbsrx]) & (~tlb_tag3_clone2_q[`tagpos_type_ptereload])) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b011)) |
(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b001) & tlb_tag3_clone2_q[`tagpos_ind]);
assign iprot_enable_clone = tlb_tag3_clone2_q[`tagpos_type_snoop];
// For snoop ttypes...
// `tagpos_is -> IS(0): Local snoop
// `tagpos_is+1 to `tagpos_is+3 -> IS(1)/Class: 0=all in lpar, 1=tid, 2=gs, 3=vpn, 4=class0, 5=class1, 6=class2, 7=class3
assign comp_extclass_clone = 2'b00;
assign comp_iprot_clone = 1'b0;
// added for ISA v2.06 addendum: tlbilx T=1 by pid, use mas6.sind as ind bit compare enable, compare value=0
assign comp_ind_clone = tlb_tag3_clone2_q[`tagpos_ind] & (~(tlb_tag3_clone2_q[`tagpos_type_snoop] & (tlb_tag3_clone2_q[`tagpos_is + 1:`tagpos_is + 3] == 3'b001)));
//----------------- end of cloned compare logic
// tag4 phase signals, tlbwe/re ex6, tlbsx/srx ex7
assign tlb_tag4_type_sig[0:7] = tlb_tag4_q[`tagpos_type:`tagpos_type + 7];
assign tlb_tag4_esel_sig[0:2] = tlb_tag4_q[`tagpos_esel:`tagpos_esel + 2];
assign tlb_tag4_hes_sig = tlb_tag4_q[`tagpos_hes];
assign tlb_tag4_wq_sig[0:1] = tlb_tag4_q[`tagpos_wq:`tagpos_wq + 1];
assign tlb_tag4_is_sig[0:3] = tlb_tag4_q[`tagpos_is:`tagpos_is + 3];
assign tlb_tag4_hv_op = |((~msr_gs_q) & (~msr_pr_q) & tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `MM_THREADS - 1]);
assign multihit = (~((tlb_tag4_wayhit_q[0:3] == 4'b0000) | (tlb_tag4_wayhit_q[0:3] == 4'b1000) |
(tlb_tag4_wayhit_q[0:3] == 4'b0100) | (tlb_tag4_wayhit_q[0:3] == 4'b0010) |
(tlb_tag4_wayhit_q[0:3] == 4'b0001))) & |(tlb_tag4_q[`tagpos_thdid:`tagpos_thdid + `THDID_WIDTH - 1]);
// unused `tagpos_is def is mas1_v, mas1_iprot for tlbwe, and is (pte.valid & 0) for ptereloads
// hes=1 valid bits update data
assign tlb_tag4_hes1_mas1_v[0:`THDID_WIDTH - 1] = ( ({tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[1:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & (~lru_tag4_dataout_q[5]))}} ) |
( ({lru_tag4_dataout_q[0], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[2:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & lru_tag4_dataout_q[5])}} ) |
( ({lru_tag4_dataout_q[0:1], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & (~lru_tag4_dataout_q[6]))}} ) |
( ({lru_tag4_dataout_q[0:2], tlb_tag4_q[`tagpos_is]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & lru_tag4_dataout_q[6])}} ) |
( ({tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[1:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & (~lru_tag4_dataout_q[5]))}} ) |
( ({lru_tag4_dataout_q[0], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[2:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & lru_tag4_dataout_q[5])}} ) |
( ({lru_tag4_dataout_q[0:1], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & (~lru_tag4_dataout_q[6]))}} ) |
( ({lru_tag4_dataout_q[0:2], tlb_tag4_q[`tagpos_is]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & lru_tag4_dataout_q[6])}} ) |
( ({tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[1:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & (~lru_tag4_dataout_q[5]))}} ) |
( ({lru_tag4_dataout_q[0], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[2:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & lru_tag4_dataout_q[5])}} ) |
( ({lru_tag4_dataout_q[0:1], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & (~lru_tag4_dataout_q[6]))}} ) |
( ({lru_tag4_dataout_q[0:2], tlb_tag4_q[`tagpos_is]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & lru_tag4_dataout_q[6])}} ) |
( ({tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[1:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & (~lru_tag4_dataout_q[5]))}} ) |
( ({lru_tag4_dataout_q[0], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[2:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & lru_tag4_dataout_q[5])}} ) |
( ({lru_tag4_dataout_q[0:1], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & (~lru_tag4_dataout_q[6]))}} ) |
( ({lru_tag4_dataout_q[0:2], tlb_tag4_q[`tagpos_is]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & lru_tag4_dataout_q[6])}} );
// hes=0 valid bits update data
assign tlb_tag4_hes0_mas1_v[0:`THDID_WIDTH - 1] = ( ({tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[1:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[0], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[2:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({lru_tag4_dataout_q[0:1], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[0:2], tlb_tag4_q[`tagpos_is]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[1:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[0], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[2:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({lru_tag4_dataout_q[0:1], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[0:2], tlb_tag4_q[`tagpos_is]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[1:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[0], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[2:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({lru_tag4_dataout_q[0:1], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[0:2], tlb_tag4_q[`tagpos_is]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[1:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[0], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[2:3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({lru_tag4_dataout_q[0:1], tlb_tag4_q[`tagpos_is], lru_tag4_dataout_q[3]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[0:2], tlb_tag4_q[`tagpos_is]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & tlb_tag4_q[`tagpos_esel + 2])}} );
// hes=1 iprot bits update data
assign tlb_tag4_hes1_mas1_iprot[0:`THDID_WIDTH - 1] = ( ({tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[9:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & (~lru_tag4_dataout_q[5]))}} ) |
( ({lru_tag4_dataout_q[8], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[10:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & lru_tag4_dataout_q[5])}} ) |
( ({lru_tag4_dataout_q[8:9], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & (~lru_tag4_dataout_q[6]))}} ) |
( ({lru_tag4_dataout_q[8:10], tlb_tag4_q[`tagpos_is + 1]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & lru_tag4_dataout_q[6])}} ) |
( ({tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[9:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & (~lru_tag4_dataout_q[5]))}} ) |
( ({lru_tag4_dataout_q[8], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[10:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & lru_tag4_dataout_q[5])}} ) |
( ({lru_tag4_dataout_q[8:9], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & (~lru_tag4_dataout_q[6]))}} ) |
( ({lru_tag4_dataout_q[8:10], tlb_tag4_q[`tagpos_is + 1]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & lru_tag4_dataout_q[6])}} ) |
( ({tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[9:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & (~lru_tag4_dataout_q[5]))}} ) |
( ({lru_tag4_dataout_q[8], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[10:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & lru_tag4_dataout_q[5])}} ) |
( ({lru_tag4_dataout_q[8:9], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & (~lru_tag4_dataout_q[6]))}} ) |
( ({lru_tag4_dataout_q[8:10], tlb_tag4_q[`tagpos_is + 1]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & lru_tag4_dataout_q[6])}} ) |
( ({tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[9:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & (~lru_tag4_dataout_q[5]))}} ) |
( ({lru_tag4_dataout_q[8], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[10:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & tlb_tag4_q[`tagpos_hes] & (~lru_tag4_dataout_q[4]) & lru_tag4_dataout_q[5])}} ) |
( ({lru_tag4_dataout_q[8:9], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & (~lru_tag4_dataout_q[6]))}} ) |
( ({lru_tag4_dataout_q[8:10], tlb_tag4_q[`tagpos_is + 1]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & tlb_tag4_q[`tagpos_hes] & lru_tag4_dataout_q[4] & lru_tag4_dataout_q[6])}} );
// hes=0 iprot bits update data
assign tlb_tag4_hes0_mas1_iprot[0:`THDID_WIDTH - 1] = ( ({tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[9:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[8], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[10:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({lru_tag4_dataout_q[8:9], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[8:10], tlb_tag4_q[`tagpos_is + 1]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 0] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[9:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[8], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[10:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({lru_tag4_dataout_q[8:9], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[8:10], tlb_tag4_q[`tagpos_is + 1]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 1] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[9:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[8], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[10:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({lru_tag4_dataout_q[8:9], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[8:10], tlb_tag4_q[`tagpos_is + 1]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 2] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[9:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[8], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[10:11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & (~tlb_tag4_q[`tagpos_hes]) & (~tlb_tag4_q[`tagpos_esel + 1]) & tlb_tag4_q[`tagpos_esel + 2])}} ) |
( ({lru_tag4_dataout_q[8:9], tlb_tag4_q[`tagpos_is + 1], lru_tag4_dataout_q[11]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & (~tlb_tag4_q[`tagpos_esel + 2]))}} ) |
( ({lru_tag4_dataout_q[8:10], tlb_tag4_q[`tagpos_is + 1]}) & {`THDID_WIDTH{(tlb_tag4_q[`tagpos_thdid + 3] & (~tlb_tag4_q[`tagpos_hes]) & tlb_tag4_q[`tagpos_esel + 1] & tlb_tag4_q[`tagpos_esel + 2])}} );
// ptereload write phase signals
assign tlb_tag4_ptereload_v[0:`THDID_WIDTH - 1] = ((lru_tag4_dataout_q[4:5] == 2'b00)) ? ({ptereload_req_pte_lat[`ptepos_valid], lru_tag4_dataout_q[1:3]}) :
((lru_tag4_dataout_q[4:5] == 2'b01)) ? ({lru_tag4_dataout_q[0], ptereload_req_pte_lat[`ptepos_valid], lru_tag4_dataout_q[2:3]}) :
((lru_tag4_dataout_q[4] == 1'b1 & lru_tag4_dataout_q[6] == 1'b0)) ? ({lru_tag4_dataout_q[0:1], ptereload_req_pte_lat[`ptepos_valid], lru_tag4_dataout_q[3]}) :
((lru_tag4_dataout_q[4] =