// © IBM Corp. 2020
// Licensed under the Apache License, Version 2.0 (the "License"), as modified by
// the terms below; you may not use the files in this repository except in
// compliance with the License as modified.
// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
//
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//
//    1) For the purpose of the patent license granted to you in Section 3 of the
//    License, the "Work" hereby includes implementations of the work of authorship
//    in physical form.
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//    necessary for implementation of the Work that are available from OpenPOWER
//    via the Power ISA End User License Agreement (EULA) are explicitly excluded
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`timescale 1 ns / 1 ns

// *!****************************************************************
// *! FILENAME    : tri_nand3.v
// *! DESCRIPTION : Three input NAND gate
// *!****************************************************************

`include "tri_a2o.vh"

module tri_nand3(
   y,
   a,
   b,
   c
);
   parameter                      WIDTH = 1;
   parameter                      BTR = "NAND3_X2M_NONE";  //Specify full BTR name, else let tool select
   output [0:WIDTH-1]  y;
   input [0:WIDTH-1]   a;
   input [0:WIDTH-1]   b;
   input [0:WIDTH-1]   c;

   // tri_nand3
   genvar 	       i;

   generate
	   for (i = 0; i < WIDTH; i = i + 1) begin : w
         nand I0(y[i], a[i], b[i], c[i]);
	   end
   endgenerate
endmodule